SN74ALVCH244

ACTIVO

Búferes de 8 canales, 1.65 V a 3.6 V con retención de bus y salidas de 3 estados

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Hoja de datos

document-pdfAcrobat SN74ALVCH244 datasheet (Rev. F) (Inglés)

SN74ALVCH244

ACTIVO

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Detalles del producto

Technology family

ALVC

Number of channels

8

IOL (max) (mA)

24

Supply current (max) (µA)

10

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

ALVC

Number of channels

8

IOL (max) (mA)

24

Supply current (max) (µA)

10

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (DW)

20

131.84 mm² (12.8 mm × 10.3 mm)

TSSOP (PW)

20

41.6 mm² (6.5 mm × 6.4 mm)

TVSOP (DGV)

20

32 mm² (5 mm × 6.4 mm)

Operates From 1.65 V to 3.6 V
Max t_pd of 2.8 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

Operates From 1.65 V to 3.6 V
Max t_pd of 2.8 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

This octal buffer/line driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH244 is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This octal buffer/line driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH244 is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

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Documentación técnica

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Documentación principal	Tipo	Título	Opciones de formato	Descargar la versión más reciente en inglés		Fecha
*	Hoja de datos	SN74ALVCH244 datasheet (Rev. F)			20/08/2004
	Nota sobre la aplicación	An Overview of Bus-Hold Circuit and the Applications (Rev. B)			17/09/2018

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación (EVM) 14-24-LOGIC-EVM está diseñado para admitir cualquier dispositivo lógico que se encuentre en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

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