These universal 9-bit parity generators/checkers utilize advanced
Schottky high-performance
circuitry and feature odd ( 
ODD)
and even ( EVEN) outputs
to facilitate operation of either odd- or even-parity applications.
The word-length capability is easily expanded by cascading.
These devices can be used to upgrade the performance of most systems utilizing the SN74ALS180 and SN74AS180 parity generators/checkers. Although the SN74ALS280 and SN74AS280 are implemented without expander inputs, the corresponding function is provided by the availability of an input (I) at terminal 4 and the absence of any internal connection at terminal 3. This permits the SN74ALS280 and SN74AS280 to be substituted for the SN74ALS180 and SN74AS180 in existing designs to produce an identical function even if the devices are mixed with existing SN74ALS180 and SN74AS180 devices.
All SN74AS280 inputs are buffered to lower the drive requirements.
The SN74ALS280 and SN74AS280 are characterized for operation from 0°C to 70°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | 9-Bit Parity Generators/Checkers datasheet (Rev. C) | 01 dic 1994 | |
| Selection guide | Logic Guide (Rev. AB) | 12 jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 dic 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 ene 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 jul 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 ago 2002 | ||
| Application note | Designing With Logic (Rev. C) | 01 jun 1997 | ||
| Application note | Advanced Schottky Load Management | 01 feb 1997 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 01 oct 1996 | ||
| Application note | Live Insertion | 01 oct 1996 | ||
| Application note | Advanced Schottky (ALS and AS) Logic Families | 01 ago 1995 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.
| Paquete | Pasadores | Descargar |
|---|---|---|
| PDIP (N) | 14 | Ver opciones |
| SOP (NS) | 14 | Ver opciones |
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