SN74BCT29827B

ACTIVO

Búferes de 10 canales, 4.5 V a 5.5 V con salidas de 3 estados

Detalles del producto

Technology family BCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 10 IOL (max) (mA) 48 Supply current (max) (µA) 40000 IOH (max) (mA) -24 Input type Bipolar Output type 3-State Features Over-voltage tolerant inputs, Power up 3-state, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) 0 to 70
Technology family BCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 10 IOL (max) (mA) 48 Supply current (max) (µA) 40000 IOH (max) (mA) -24 Input type Bipolar Output type 3-State Features Over-voltage tolerant inputs, Power up 3-state, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) 0 to 70
SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • P-N-P Inputs Reduce DC Loading
  • Flow-Through Architecture Optimizes PCB Layout
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • P-N-P Inputs Reduce DC Loading
  • Flow-Through Architecture Optimizes PCB Layout
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)

These 10-bit buffers and bus drivers provide high-performance bus interface for wide data paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (or ) input is high, all ten outputs are in the high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down.

The SN54BCT29827B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT29827B is characterized for operation from 0°C to 70°C.

These 10-bit buffers and bus drivers provide high-performance bus interface for wide data paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (or ) input is high, all ten outputs are in the high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down.

The SN54BCT29827B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT29827B is characterized for operation from 0°C to 70°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet 10-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. C) 01 nov 1993
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 ago 1997
Application note Designing With Logic (Rev. C) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML
Modelo de simulación

SN74BCT29827B Behavioral SPICE Model

SCBM126.ZIP (7 KB) - PSpice Model
Paquete Pasadores Descargar
SOIC (DW) 24 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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