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Interruptores y multiplexores
Interruptores y multiplexores analógicos
Protocolo e interruptores de bus y multiplexores

SN74CBT162292

ACTIVO

Interruptor analógico de uso general de 5 V, 2:1 (SPDT) y 12 canales con resistores de bajada intern

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SN74CBT162292

ACTIVO
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Detalles del producto

Protocols Analog Configuration 2:1 SPDT Number of channels 12 Bandwidth (MHz) 200 Supply voltage (max) (V) 5.5 Ron (typ) (mΩ) 37000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 8 OFF-state leakage current (max) (µA) 5 Ron (max) (mΩ) 63000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 2:1 SPDT Number of channels 12 Bandwidth (MHz) 200 Supply voltage (max) (V) 5.5 Ron (typ) (mΩ) 37000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 8 OFF-state leakage current (max) (µA) 5 Ron (max) (mΩ) 63000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DL) 56 190.647 mm² 18.42 x 10.35 TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • Member of Texas Instruments' WidebusTM Family
  • TTL-Compatible Control Input Levels
  • Isolation Under Power-Off Conditions
  • Make-Before-Break Feature
  • Internal 500- Pulldown Resistors to Ground
  • A-Port Inputs/Outputs Have Equivalent 25- Series Resistors, So No External Resistors Are Required
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

    Widebus is a trademark of Texas Instruments.
  • Member of Texas Instruments' WidebusTM Family
  • TTL-Compatible Control Input Levels
  • Isolation Under Power-Off Conditions
  • Make-Before-Break Feature
  • Internal 500- Pulldown Resistors to Ground
  • A-Port Inputs/Outputs Have Equivalent 25- Series Resistors, So No External Resistors Are Required
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

    Widebus is a trademark of Texas Instruments.

The SN74CBT162292 is a 12-bit 1-of-2 high-speed TTL-compatible FET multiplexer/
demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

When the select (S) input is low, port A is connected to port B1, and RINT is connected to port B2. When S is high, port A is connected to port B2, and RINT is connected to port B1.

The A-port inputs/outputs include equivalent 25- series resistors to reduce overshoot and undershoot.

The SN74CBT162292 is a 12-bit 1-of-2 high-speed TTL-compatible FET multiplexer/
demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

When the select (S) input is low, port A is connected to port B1, and RINT is connected to port B2. When S is high, port A is connected to port B2, and RINT is connected to port B1.

The A-port inputs/outputs include equivalent 25- series resistors to reduce overshoot and undershoot.
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Documentación técnica

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* Data sheet 12-Bit 1-of-2 FET Multiplexer/Demultiplexer With Internal Pulldown Resistors datasheet (Rev. E) 23 oct 2000
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06 ene 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 jul 2018
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note How to Select Little Logic (Rev. A) 26 jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 nov 2004
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 jun 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
More literature CBT RAID Application Clip 12 jun 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 feb 2003
Application note Texas Instruments Little Logic Application Report 01 nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 may 2002
Application note Flexible Voltage-Level Translation With CBT Family Devices 20 jul 1999
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) 01 dic 1998
Application note 3.3-V to 2.5-V Translation with Texas Instruments Crossbar Technology (Rev. A) 03 abr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 dic 1997
Application note 5-V To 3.3-V Translation With the SN74CBTD3384 (Rev. B) 01 mar 1997
Application note Understanding Advanced Bus-Interface Products Design Guide 01 may 1996
Selection guide Logic Guide (Rev. AC) PDF | HTML 01 jun 1994

Diseño y desarrollo

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
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Pedidos y calidad

Información incluida:
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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
  • Lugar de ensamblaje

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