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Protocolo e interruptores de bus y multiplexores

SN74CBT3384A

NO RECOMENDADO PARA NUEVOS DISEÑOS

Interruptor de bus FET de uso general de 5 V, 1:1 (SPST) y 10 canales con 2 entradas de control

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SN74CBT3384A

NO RECOMENDADO PARA NUEVOS DISEÑOS
Hoja de datos Haga su pedido ahora

Detalles del producto

Protocols Analog Configuration 1:1 SPST Number of channels 10 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 4.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 20000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 10 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 4.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 20000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm) TVSOP (DGV) 24 32 mm² (5 mm × 6.4 mm) SSOP (DBQ) 24 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 24 49.92 mm² (7.8 mm × 6.4 mm) SSOP (DB) 24 63.96 mm² (8.2 mm × 7.8 mm)
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels

The SN74CBT3384A provides ten bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as two 5-bit switches with separate output-enable (OE\) inputs. When OE\ is low, the switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

The SN74CBT3384A provides ten bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as two 5-bit switches with separate output-enable (OE\) inputs. When OE\ is low, the switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
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* Hoja de datos SN74CBT3384A datasheet (Rev. L) 15/01/2004

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