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SN74CBTD3384C

ACTIVO

Interruptor de bus FET de uso general de 5 V, 1:1 (SPST) y 10 canales con protección contra subdispa

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SN74CBTD3384C

ACTIVO
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Detalles del producto

Protocols Analog Configuration 1:1 SPST Number of channels 10 Bandwidth (MHz) 20 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 12.5 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 20000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 10 Bandwidth (MHz) 20 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 12.5 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 20000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm) TSSOP (PW) 24 49.92 mm² (7.8 mm × 6.4 mm) SSOP (DB) 24 63.96 mm² (8.2 mm × 7.8 mm) SSOP (DBQ) 24 51.9 mm² (8.65 mm × 6 mm) TVSOP (DGV) 24 32 mm² (5 mm × 6.4 mm)
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Integrated Diode to VCC Provides 5-V Input Down To 3.3-V Output Level Shift
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • VCC Operating Range From 4.5 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Integrated Diode to VCC Provides 5-V Input Down To 3.3-V Output Level Shift
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • VCC Operating Range From 4.5 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The SN74CBTD3384C is a high-speed TTL-compatible FET bus switch with low ON-state resistance, allowing for minimal propagation delay. This device features an integrated diode to VCC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3384C provides protection for undershoot down to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper state.

The SN74CBTD3384C is organized as two 5-bit bus switches with separate output-enable (OE)\ inputs. It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is ON, and port A is connected to port B. When OE\ is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTD3384C is a high-speed TTL-compatible FET bus switch with low ON-state resistance, allowing for minimal propagation delay. This device features an integrated diode to VCC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3384C provides protection for undershoot down to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper state.

The SN74CBTD3384C is organized as two 5-bit bus switches with separate output-enable (OE)\ inputs. It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is ON, and port A is connected to port B. When OE\ is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SN74CBTD3384C datasheet (Rev. A) 15/10/2003
Nota sobre la aplicación Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2/06/2022
Nota sobre la aplicación Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 1/12/2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 6/01/2021

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Modelo de simulación

SN74CBTD3384C IBIS Model

SCDM048.ZIP (26 KB) - Modelo IBIS
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (DW) 24 Ultra Librarian
TSSOP (PW) 24 Ultra Librarian
SSOP (DB) 24 Ultra Librarian
SSOP (DBQ) 24 Ultra Librarian
TVSOP (DGV) 24 Ultra Librarian
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