This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.
A buffered output enable 
input can be used to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive
provide the capability to drive bus lines without need for interface
or pullup components.
The output enable does
not affect the internal operations of the flip-flops. Old data can be
retained or new data can be entered while the outputs are in the
high-impedance state.
The SN74F574 is characterized for operation from 0°C to 70°C.
| Documentación principal | Tipo | Título | Opciones de formato | Descargar la versión más reciente en inglés | Fecha |
|---|---|---|---|---|---|
| * | Hoja de datos | Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs datasheet (Rev. A) | 1/10/1993 |
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