The '246 and '247 are electrically and functionally identical to the SN5446A/SN7446A, and SN5447A/SN7447A respectively, and have the same pin assignments as their equivalents. The 'LS247 and 'LS248 are electrically and functionally identical to the SN54LS47/SN74LS47 and SN54LS48/SN74LS48, respectively, and have the same pin assignments as their equivalents. They can be used interchangeably in present or future designs to offer designers a choice between two indicator fonts. The '46A, '47A, 'LS47, and 'LS48 compose the 6 and 9 the without tails and the '246, '247, 'LS247, and 'LS248 compose the and the with tails. Composition of all other characters, including display patterns for BCD inputs above nine, is identical. The '246, '247, and 'LS247 feature active-low outputs designed for driving indicators directly, and the 'LS248 features active-high outputs for driving lamp buffers. All of the circuits have full ripple-blanking input/output controls and a lamp test input. Segment identification and resultant displays are shown below. Display patterns for BCD input counts above 9 are unique symbols to authenticate input conditions.
All of these circuits incorporate automatic leading and/or trailing-edge zero-blanking control (RBI\ and RBO\). Lamp test (LT\) of these types may be performed at any time when the BI\/RBO\ node is at a high level. All types contain an overriding blanking input (BI) which can be used to control the lamp intensity by pulsing or to inhibit the outputs. Inputs and outputs are entirely compatible for use with TTL logic outputs.
Series 54 and Series 54LS devices are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS devices are characterized for operation from 0°C to 70°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | BCD-to-Seven-Segment Decoders/Drivers datasheet | 01 mar 1988 | |
| Selection guide | Logic Guide (Rev. AB) | 12 jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 dic 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 ene 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 jul 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 ago 2002 | ||
| Application note | Designing With Logic (Rev. C) | 01 jun 1997 | ||
| Application note | Designing with the SN54/74LS123 (Rev. A) | 01 mar 1997 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 01 oct 1996 | ||
| Application note | Live Insertion | 01 oct 1996 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| PDIP (N) | 16 | Ultra Librarian |
| SOIC (D) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |
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