Inicio Lógica y traducción de voltaje Búferes, controladores y transceptores Búferes y controladores no inversores
Inicio
Lógica y traducción de voltaje
Búferes, controladores y transceptores
Búferes y controladores no inversores

SN74LVC16244A

ACTIVO

Búferes de 16 canales, 1.65 V a 3.6 V con salidas de 3 estados

Haga su pedido ahora
Hoja de datos

SN74LVC16244A

ACTIVO
Haga su pedido ahora

Detalles del producto

Technology family LVC Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 20 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 20 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Member of the Texas Instruments
    Widebus Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Supports Mixed-Mode Signal Operation on All Ports
    (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • Member of the Texas Instruments
    Widebus Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Supports Mixed-Mode Signal Operation on All Ports
    (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

This 16-bit buffer/driver is designed for 1.65-V to
3.6-V VCC operation.

The SN74LVC16244A device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The SN74LVC16244A device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The device provides true outputs and symmetrical active-low output-enable (OE) inputs.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This 16-bit buffer/driver is designed for 1.65-V to
3.6-V VCC operation.

The SN74LVC16244A device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The SN74LVC16244A device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The device provides true outputs and symmetrical active-low output-enable (OE) inputs.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
filter Buscar otro/a Búferes y controladores no inversores
Descargar Ver vídeo con transcripción Video

Documentación técnica

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 1
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SN74LVC16244A 16-Bit Buffer/Driver With 3-State Outputs datasheet (Rev. C) PDF | HTML 28/01/2014

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

SN74LVC16244A Behavioral SPICE Model

SCAM107.ZIP (7 KB) - Modelo PSpice
Productos y hardware compatibles
Modelo de simulación

SN74LVC16244A IBIS Model

SCEM228.ZIP (42 KB) - Modelo IBIS
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SSOP (DL) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

Videos