Inicio Microcontroladores (MCU) y procesadores Microprocesadores y DSP SoC del procesador de señal digital (DSP) de radar y audio
Inicio
Microcontroladores (MCU) y procesadores
Microprocesadores y DSP
SoC del procesador de señal digital (DSP) de radar y audio

TMS320VC33

ACTIVO

DSP de punto flotante C30x

Haga su pedido ahora
Hoja de datos

TMS320VC33

ACTIVO
Hoja de datos Haga su pedido ahora

Detalles del producto

CPU 32-bit Rating Catalog Operating temperature range (°C) -40 to 100
CPU 32-bit Rating Catalog Operating temperature range (°C) -40 to 100
LQFP (PGE) 144 484 mm² (22 mm × 22 mm)
  • High-Performance Floating-Point Digital Signal Processor (DSP):
    • TMS320VC33-150
      • 13-ns Instruction Cycle Time
      • 150 Million Floating-Point Operations Per Second (MFLOPS)
      • 75 Million Instructions Per Second (MIPS)
    • TMS320VC33-120
      • 17-ns Instruction Cycle Time
      • 120 MFLOPS
      • 60 MIPS
  • 34K × 32-Bit (1.1-Mbit) On-Chip Words of Dual-Access Static Random-Access Memory (SRAM) Configured in 2 × 16K Plus 2 × 1K Blocks to Improve Internal Performance
  • x5 Phase-Locked Loop (PLL) Clock Generator
  • Very Low Power: < 200 mW @ 150 MFLOPS
  • 32-Bit High-Performance CPU
  • 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations
  • Four Internally Decoded Page Strobes to Simplify Interface to I/O and Memory Devices
  • Boot-Program Loader
  • EDGEMODE Selectable External Interrupts
  • 32-Bit Instruction Word, 24-Bit Addresses
  • Eight Extended-Precision Registers
  • On-Chip Memory-Mapped Peripherals:
    • One Serial Port
    • Two 32-Bit Timers
    • Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation
  • Fabricated Using the 0.18-µm (leff-Effective Gate Length) TImeline™ Technology by Texas Instruments (TI)
  • 144-Pin Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
  • Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • Two Low-Power Modes
  • Two- and Three-Operand Instructions
  • Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle
  • Block-Repeat Capability
  • Zero-Overhead Loops With Single-Cycle Branches
  • Conditional Calls and Returns
  • Interlocked Instructions for Multiprocessing Support
  • Bus-Control Registers Configure Strobe-Control Wait-State Generation
  • 1.8-V (Core) and 3.3-V (I/O) Supply Voltages
  • On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG)

IEEE Standard 1149.1-1990 Standard-Test-Access Port
TImeline is a trademark of Texas Instruments.
Other trademarks are the property of their respective owners.
  • High-Performance Floating-Point Digital Signal Processor (DSP):
    • TMS320VC33-150
      • 13-ns Instruction Cycle Time
      • 150 Million Floating-Point Operations Per Second (MFLOPS)
      • 75 Million Instructions Per Second (MIPS)
    • TMS320VC33-120
      • 17-ns Instruction Cycle Time
      • 120 MFLOPS
      • 60 MIPS
  • 34K × 32-Bit (1.1-Mbit) On-Chip Words of Dual-Access Static Random-Access Memory (SRAM) Configured in 2 × 16K Plus 2 × 1K Blocks to Improve Internal Performance
  • x5 Phase-Locked Loop (PLL) Clock Generator
  • Very Low Power: < 200 mW @ 150 MFLOPS
  • 32-Bit High-Performance CPU
  • 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations
  • Four Internally Decoded Page Strobes to Simplify Interface to I/O and Memory Devices
  • Boot-Program Loader
  • EDGEMODE Selectable External Interrupts
  • 32-Bit Instruction Word, 24-Bit Addresses
  • Eight Extended-Precision Registers
  • On-Chip Memory-Mapped Peripherals:
    • One Serial Port
    • Two 32-Bit Timers
    • Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation
  • Fabricated Using the 0.18-µm (leff-Effective Gate Length) TImeline™ Technology by Texas Instruments (TI)
  • 144-Pin Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
  • Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • Two Low-Power Modes
  • Two- and Three-Operand Instructions
  • Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle
  • Block-Repeat Capability
  • Zero-Overhead Loops With Single-Cycle Branches
  • Conditional Calls and Returns
  • Interlocked Instructions for Multiprocessing Support
  • Bus-Control Registers Configure Strobe-Control Wait-State Generation
  • 1.8-V (Core) and 3.3-V (I/O) Supply Voltages
  • On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG)

IEEE Standard 1149.1-1990 Standard-Test-Access Port
TImeline is a trademark of Texas Instruments.
Other trademarks are the property of their respective owners.

The TMS320VC33 DSP is a 32-bit, floating-point processor manufactured in 0.18-µm four-level-metal CMOS (TImeline) technology. The TMS320VC33 is part of the TMS320C3x generation of DSPs from Texas Instruments.

The TMS320C3x’s internal busing and special digital-signal-processing instruction set have the speed and flexibility to execute up to 150 million floating-point operations per second (MFLOPS). The TMS320VC33 optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

The TMS320VC33 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short machine-cycle time. High performance and ease of use are the results of these features.

General-purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and externally generated wait states, one external interface port, two timers, one serial port, and multiple-interrupt structure. The TMS320C3x supports a wide variety of system applications from host processor to dedicated coprocessor. High-level-language support is easily implemented through a register-based architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported floating-point arithmetic.

The TMS320VC33 is a superset of the TMS320C31. Designers now have an additional 1M bits of on-chip SRAM, a maximum throughput of 150 MFLOPS, and several I/O enhancements that allow easy upgrades to current systems or creation of new baselines. This data sheet provides information required to fully utilize the new features of the TMS320VC33 device. For general TMS320C3x architecture and programming information, see the TMS320C3x User’s Guide (literature number SPRU031).

The TMS320VC33 DSP is a 32-bit, floating-point processor manufactured in 0.18-µm four-level-metal CMOS (TImeline) technology. The TMS320VC33 is part of the TMS320C3x generation of DSPs from Texas Instruments.

The TMS320C3x’s internal busing and special digital-signal-processing instruction set have the speed and flexibility to execute up to 150 million floating-point operations per second (MFLOPS). The TMS320VC33 optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

The TMS320VC33 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short machine-cycle time. High performance and ease of use are the results of these features.

General-purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and externally generated wait states, one external interface port, two timers, one serial port, and multiple-interrupt structure. The TMS320C3x supports a wide variety of system applications from host processor to dedicated coprocessor. High-level-language support is easily implemented through a register-based architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported floating-point arithmetic.

The TMS320VC33 is a superset of the TMS320C31. Designers now have an additional 1M bits of on-chip SRAM, a maximum throughput of 150 MFLOPS, and several I/O enhancements that allow easy upgrades to current systems or creation of new baselines. This data sheet provides information required to fully utilize the new features of the TMS320VC33 device. For general TMS320C3x architecture and programming information, see the TMS320C3x User’s Guide (literature number SPRU031).
filter Buscar otro/a SoC del procesador de señal digital (DSP) de radar y audio
Descargar Ver vídeo con transcripción Video
No se encuentra disponible ningún soporte de diseño de TI

Este producto no cuenta con soporte de diseño continuo de TI para proyectos nuevos, como contenidos nuevos o actualizaciones de software. Si está disponible, encontrará material adicional, software y herramientas relevantes en la página del producto. También puede buscar información archivada en los foros de soporte de TI E2ETM.

Documentación técnica

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 29
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TMS320VC33 Digital Signal Processor datasheet (Rev. E) 30/01/2004
Nota sobre la aplicación 320C3x, 320C4x, and 320MCM42x Power-Up Sensitivity at Cold Temperatures (Rev. D) 6/08/2004
Guía del usuario TMS320C33 User's Guide (Rev. F) 31/03/2004
Más documentación SM302VC33GNMM150, SMJ320VC33HFGM150, SM320VC33GNMEP (Rev. C) 18/12/2002
Nota sobre la aplicación UltraLow-Power Supply Voltage Supervisor Family TPS383x 20/06/2000
Guía del usuario TMS320C3x/C4x Assembly Language Tools User's Guide (Rev. D) 16/04/1998
Guía del usuario TMS320C3x/C4x Optimizing C Compiler User's Guide (Rev. H) 14/04/1998
Nota sobre la aplicación EDRAM Memory Controller for the TMS320C31 DSP Application Report 1/01/1998
Guía del usuario TMS320C3x General-Purpose Applications User's Guide 1/01/1998
Nota sobre la aplicación An Adaptive Noise Cancelling System to Enhance Sonar Receiver Performance -C31 1/07/1997
Nota sobre la aplicación Implementing a Noise Cancellation System with the TMS320C31 1/07/1997
Nota sobre la aplicación Implementing Vocoder and HFF Modem Algorithms Using the TMS320C31 DSP 1/07/1997
Nota sobre la aplicación In-Service, Non-Intrusive Measurement Device in Telecomm. Networks - TMS320C31 1/07/1997
Nota sobre la aplicación Implementing a Fast 3-D Vision Sensor With Multiple TMS320C31 DSPs 1/07/1997
Nota sobre la aplicación Signal Processing Subsystem-Detection of Stimulated Otoacoustic Emissions 'C31 1/07/1997
Nota sobre la aplicación Real-Tme Implementation of a COFDM Modem for Data Transmission Over HF Channels 1/07/1997
Nota sobre la aplicación Switching From Bootloader to MP Mode with TMS320C31 1/06/1997
Nota sobre la aplicación An Introduction to Fractal Image Compression 1/01/1997
Nota sobre la aplicación Interfacing Memory to the TMS320C32 DSP (Rev. A) 1/05/1996
Nota sobre la aplicación FIFO Synchronous Retransmit: Programmable DSP-Interface for FIR Filtering (Rev. A) 1/03/1996
Nota sobre la aplicación Interfacing TI Clocked FIFOs With TI Floating-Point DSPs (Rev. A) 1/03/1996
Nota sobre la aplicación FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (Rev. A) 1/03/1996
Nota sobre la aplicación How TMS320 Tools Interact With the TMS320C32's Enhanced Memory Interface 1/11/1995
Nota sobre la aplicación Engine Knock Detection Using Spectral Analysis With TMS320C25 or TMS320C30 DSPs 1/01/1995
Guía del usuario JTAG/MPSD Emulation Technical Reference (Rev. A) 1/12/1994
Nota sobre la aplicación Setting Up TMS320 DSP Interrupts in 'C' 1/11/1994
Guía del usuario TMS320C3x Workstation Emulator Installation Guide 1/11/1994
Guía del usuario TMS320C3x Evaluation Module Installation Guide 1/11/1993
Nota sobre la aplicación TMS320C31 Embedded Control Technical Brief 1/08/1992

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

IDE, configuración, compilador o depurador

CODECOMPOSER — Code Composer IDE para dispositivos TMS320C3x/C4x

Additional Information


Code Composer v4 was the last release of the Code Composer IDE that supported older digital signal processors such as TMS320C3x/4x and TMS320C2x/C5x.  There were different versions for these families. These products are no longer available for purchase or download. (...)

Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
LQFP (PGE) 144 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

Videos