패키징 정보
| 패키지 | 핀 SOT-23 (DBV) | 5 |
| 작동 온도 범위(°C) -40 to 125 |
| 패키지 수량 | 캐리어 3,000 | LARGE T&R |
TLV840의 주요 특징
- Operating voltage range : 0.7 V to 6 V
- Nano supply current : 120 nA (Typical)
- Fixed threshold voltage
(VIT-): 0.8 V to 5.4 V
- Threshold voltages available in 100mV steps
- High accuracy: ±0.5% (Typical)
- Built-in hysteresis (VHYS): 5% (Typical)
- Reset time delay (tD):
capacitor-based programmable (TLV840C, TLV840M)
- Minimum time delay: 40 µs (typical) without capacitor
- Active-low manual reset (MR) (TLV840M)
- Four output topologies:
- TLV840xxDL: open-drain, active-low (RESET)
- TLV840xxPL: push-pull, active-low (RESET)
- TLV840xxDH: open-drain, active-high (RESET)
- TLV840xxPH: push-pull, active-high (RESET)
- Wide temperature range: –40°C to +125°C
- Package: SOT23-5 (DBV)
TLV840에 대한 설명
The TLV840 family of voltage supervisors or reset ICs can operate at high voltage levels while maintaining very low quiescent current across the whole VDD and temperature range. TLV840 offers best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).
Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground for TLV840C and TLV840M. For a minimum reset delay time the CT pin can be left floating. TLV840N does not offer a programmable delay and offers fixed reset delay timing options: 40 µs, 2 ms, 10 ms, 30 ms, 50 ms, 80 ms, 100 ms, 150 ms, 200 ms.
Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840 is a perfect voltage monitoring solution for industrial applications and battery-powered / low-power applications.