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SN74AHC132

ACTIVE

4-ch 4-input 2-V to 5.5-V NAND gates with Schmitt-Trigger inputs

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Data sheet

SN74AHC132

ACTIVE
Data sheet Order now

Product details

Technology family AHC Number of channels 4 Inputs per channel 4 IOL (max) (mA) 8 IOH (max) (mA) -8 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns), Over-voltage tolerant inputs Data rate (max) (Mbps) 110 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AHC Number of channels 4 Inputs per channel 4 IOL (max) (mA) 8 IOH (max) (mA) -8 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns), Over-voltage tolerant inputs Data rate (max) (Mbps) 110 Rating Catalog Operating temperature range (°C) -40 to 125
SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm) TVSOP (DGV) 14 23.04 mm² (3.6 mm × 6.4 mm) VQFN (RGY) 14 12.25 mm² (3.5 mm × 3.5 mm)
  • Operating range 2V to 5.5V VCC
  • Operation from very slow input transitions
  • Temperature-compensated threshold levels
  • High noise immunity
  • Same pinouts as SNx4AHC00
  • Latch-up performance exceeds 250mAper JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model
    • 1000V charged-device model
  • Operating range 2V to 5.5V VCC
  • Operation from very slow input transitions
  • Temperature-compensated threshold levels
  • High noise immunity
  • Same pinouts as SNx4AHC00
  • Latch-up performance exceeds 250mAper JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model
    • 1000V charged-device model

The SN7AHC132 device is a quadruple positive-NAND gate designed for 2V to 5.5V VCC operation. This device performs the Boolean functionY = A × B or Y = A + B in positive logic.

Schmitt-trigger inputs provide added noise immunity and support for slow input signal transitions.

The SN7AHC132 device is a quadruple positive-NAND gate designed for 2V to 5.5V VCC operation. This device performs the Boolean functionY = A × B or Y = A + B in positive logic.

Schmitt-trigger inputs provide added noise immunity and support for slow input signal transitions.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74AHC132 Quadruple Positive-NAND Gates with Schmitt-Trigger Inputs datasheet (Rev. K) PDF | HTML Feb 27, 2024
Analog design Journal Discrete design of a low-cost isolated 3.3- to 5-V DC/DC converter May 6, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
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Simulation model

SN74AHC132 Behavioral SPICE Model

SCLM280.ZIP (7 KB) - PSpice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOP (NS) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
PDIP (N) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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