Product details

CPU 8 Arm Cortex-A720AE Coprocessors 6 Arm Cortex-R52+ Hardware accelerators Deep learning accelerator, Depth and motion processing accelerator, Video decode accelerator, Video encode accelerator Operating system FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, u-velOSity Security Cryptographic acceleration, Secure boot TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution TPS6594-Q1 Operating temperature range (°C) -40 to 125
CPU 8 Arm Cortex-A720AE Coprocessors 6 Arm Cortex-R52+ Hardware accelerators Deep learning accelerator, Depth and motion processing accelerator, Video decode accelerator, Video encode accelerator Operating system FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, u-velOSity Security Cryptographic acceleration, Secure boot TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution TPS6594-Q1 Operating temperature range (°C) -40 to 125
FCBGA (ALF) 827 576 mm² 24 x 24

Processor cores:

  • Up-to Eight Arm Cortex-A720AE MPUs
    • Lockstep capable

Real-Time processing CPUs :

  • Up-to 6x Arm® Cortex®-R52+ (or 3x pairs in Lockstep)
    • Virtualization for multi-core processing

System/SOC CPUs:

  • 8x Dual Arm® Cortex®-M55 (Lockstep)

DSP / AI processing :

  • Up to 4x C7™ neural processing unit(NPU)
    • Up to 400 TOPS

Vision and video processing:

  • Up to 16 cameras
  • DMPAC: Dense Optical Flow, Stereo Disparity Engine
  • 4x CSI-2 RX interface, 1x CSI-2 TX output

GPU and display processing:

  • Imagination DXS Family GPU

Display subsystem:

  • eDP1.5/DP2.1
    • Multi-Stream Transport (up to 4 displays, up to 4K60fps)
  • 1x DSI CPHY-2.0/DPHY-2.1
    • Up to 4 lanes per port (muxed with CSI-TX)
  • DSS Controller:
    • 4 pipelines + 1 Writeback path, up to 4k60 per pipe

Networking subsystem:

  • NPAC (Network Processing Accelerator) specialized subsystem for Ethernet switching and packet transfer
  • Integrated Ethernet Switch
    • 8 external ports
    • 10base-T1S (OA3P 3-wire i/f) supported on all ports
    • MACSEC per port, supports line rate

Memory:

  • LPDDR4x/5/5x interface
    • In-line ECC
  • 1x UFS3.0
  • 1x eMMC5.1 HS200
  • 2x XSPI interface up to 400MBps

Security:

  • SHE/EVITA Full compliant HSM, ISO21434 compliant

Functional Safety:

Safety features:

  • Support for full ASIL D or mixed ASIL D / ASIL B with FFI

High-speed serial interfaces:

  • 2x PCIe up to 4L
    • Gen5 controller
    • Root complex or Endpoint
  • 1x USB3.2 (Gen 2)/eUSB2.0

Video acceleration:

  • H.264/H.265 Encode/Decode: 1.0GP/s encode or decode, up to 10b support

Serial interfaces:

  • Up to 170 General-Purpose Input/Output (GPIO) pin capability

TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety-Compliant support up to ASIL D/SIL 3
  • Flexible mapping to support different use cases

Processor cores:

  • Up-to Eight Arm Cortex-A720AE MPUs
    • Lockstep capable

Real-Time processing CPUs :

  • Up-to 6x Arm® Cortex®-R52+ (or 3x pairs in Lockstep)
    • Virtualization for multi-core processing

System/SOC CPUs:

  • 8x Dual Arm® Cortex®-M55 (Lockstep)

DSP / AI processing :

  • Up to 4x C7™ neural processing unit(NPU)
    • Up to 400 TOPS

Vision and video processing:

  • Up to 16 cameras
  • DMPAC: Dense Optical Flow, Stereo Disparity Engine
  • 4x CSI-2 RX interface, 1x CSI-2 TX output

GPU and display processing:

  • Imagination DXS Family GPU

Display subsystem:

  • eDP1.5/DP2.1
    • Multi-Stream Transport (up to 4 displays, up to 4K60fps)
  • 1x DSI CPHY-2.0/DPHY-2.1
    • Up to 4 lanes per port (muxed with CSI-TX)
  • DSS Controller:
    • 4 pipelines + 1 Writeback path, up to 4k60 per pipe

Networking subsystem:

  • NPAC (Network Processing Accelerator) specialized subsystem for Ethernet switching and packet transfer
  • Integrated Ethernet Switch
    • 8 external ports
    • 10base-T1S (OA3P 3-wire i/f) supported on all ports
    • MACSEC per port, supports line rate

Memory:

  • LPDDR4x/5/5x interface
    • In-line ECC
  • 1x UFS3.0
  • 1x eMMC5.1 HS200
  • 2x XSPI interface up to 400MBps

Security:

  • SHE/EVITA Full compliant HSM, ISO21434 compliant

Functional Safety:

Safety features:

  • Support for full ASIL D or mixed ASIL D / ASIL B with FFI

High-speed serial interfaces:

  • 2x PCIe up to 4L
    • Gen5 controller
    • Root complex or Endpoint
  • 1x USB3.2 (Gen 2)/eUSB2.0

Video acceleration:

  • H.264/H.265 Encode/Decode: 1.0GP/s encode or decode, up to 10b support

Serial interfaces:

  • Up to 170 General-Purpose Input/Output (GPIO) pin capability

TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety-Compliant support up to ASIL D/SIL 3
  • Flexible mapping to support different use cases

The TDA5 high-performance compute SoC family is designed to deliver safe and efficient edge AI performance, with capabilities of up to 1200 TOPS, with integrated C7™ NPU and chiplet-ready architecture. This enables seamless progression to L3 autonomous driving in software-defined vehicles, where conditional automation is possible in both urban and highway environments. Additionally, the TDA5 SoCs are well-suited for similar applications in industrial transportation, humanoid and industrial robots, and aerospace and defense with their advanced sensor processing, cybersecurity, and functional safety features.

The TDA5 SoCs feature multiple specialized subsystems, each tailored to address the growing demand for high-performance compute and cross-domain applications. These subsystems include dedicated processing cores and hardware acceleration for security, vision processing, edge AI, display rendering, and networking. By offloading these tasks, the SoCs’ MPU and MCU cores are freed up to focus on user application software. Furthermore, support for PCIe, Ethernet, and other automotive standard peripherals enables safe, secure, and high-speed data transfer between different components and systems.

Building on two decades of leadership in the automotive processor market, the TDA5 architecture is designed to provide a scalable and high-performance solution for a wide range of applications. As an evolution of the TDA4 family, software developed for TDA4 can be easily scaled to the TDA5 family, with minimal rework required. This allows for the reuse of software assets and enables the development of more complex and sophisticated applications. The TDA5 family’s unique combination of high-performance real-time and analytics cores, along with the latest C7™ NPU and next-generation accelerators for image signal processing, makes it an optimized solution for various camera, radar, sensor fusion, and AI applications.

The TDA5 family provides high-performance compute capabilities for both traditional computer vision and deep learning algorithms, with industry-leading power/performance ratios. The high level of system integration enables lower costs for advanced automotive platforms, supporting multiple sensor modalities in centralized ECUs, multiple sensor domains, or a centralized automotive computer. Key processing and acceleration cores include the latest-generation C7™ DSP with scalar and vector cores, dedicated deep learning acceleration, latest application and GPU cores for general compute, a vision and imaging subsystem, video codec, network packet processing accelerator, and Ethernet switch, as well as a dedicated security subsystem. These cores are carefully integrated into an SoC architecture designed from the ground up to support functional safety at a system level, ensuring the highest level of reliability and performance in safety-critical applications.

The TDA5 high-performance compute SoC family is designed to deliver safe and efficient edge AI performance, with capabilities of up to 1200 TOPS, with integrated C7™ NPU and chiplet-ready architecture. This enables seamless progression to L3 autonomous driving in software-defined vehicles, where conditional automation is possible in both urban and highway environments. Additionally, the TDA5 SoCs are well-suited for similar applications in industrial transportation, humanoid and industrial robots, and aerospace and defense with their advanced sensor processing, cybersecurity, and functional safety features.

The TDA5 SoCs feature multiple specialized subsystems, each tailored to address the growing demand for high-performance compute and cross-domain applications. These subsystems include dedicated processing cores and hardware acceleration for security, vision processing, edge AI, display rendering, and networking. By offloading these tasks, the SoCs’ MPU and MCU cores are freed up to focus on user application software. Furthermore, support for PCIe, Ethernet, and other automotive standard peripherals enables safe, secure, and high-speed data transfer between different components and systems.

Building on two decades of leadership in the automotive processor market, the TDA5 architecture is designed to provide a scalable and high-performance solution for a wide range of applications. As an evolution of the TDA4 family, software developed for TDA4 can be easily scaled to the TDA5 family, with minimal rework required. This allows for the reuse of software assets and enables the development of more complex and sophisticated applications. The TDA5 family’s unique combination of high-performance real-time and analytics cores, along with the latest C7™ NPU and next-generation accelerators for image signal processing, makes it an optimized solution for various camera, radar, sensor fusion, and AI applications.

The TDA5 family provides high-performance compute capabilities for both traditional computer vision and deep learning algorithms, with industry-leading power/performance ratios. The high level of system integration enables lower costs for advanced automotive platforms, supporting multiple sensor modalities in centralized ECUs, multiple sensor domains, or a centralized automotive computer. Key processing and acceleration cores include the latest-generation C7™ DSP with scalar and vector cores, dedicated deep learning acceleration, latest application and GPU cores for general compute, a vision and imaging subsystem, video codec, network packet processing accelerator, and Ethernet switch, as well as a dedicated security subsystem. These cores are carefully integrated into an SoC architecture designed from the ground up to support functional safety at a system level, ensuring the highest level of reliability and performance in safety-critical applications.

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Technical documentation

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* Data sheet TDA54x Jacinto™ Processors datasheet PDF | HTML 09 Dec 2025
Technical article 為何可擴充的高性能 SoC 是自駕車的未來 PDF | HTML 31 Dec 2025
Technical article 확장 가능한 고성능 SoC가 자율주행 차량의 미래인 이유 PDF | HTML 31 Dec 2025
Application brief Accelerating next-generation automotive designs with the TDA5 Virtualizer™ Development Kit PDF | HTML 23 Dec 2025
Technical article Why scalable high-performance SoCs are the future of autonomous vehicles PDF | HTML 19 Dec 2025

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Debug probe

LB-3P-TRACE32-ARM — Lauterbach TRACE32® Debug and Trace System for Arm®-based Microcontrollers and Processors

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of Arm®-based microcontrollers and processors. The globally renowned debug and trace solutions for embedded systems and SoCs are the perfect (...)

Software development kit (SDK)

SNPS-3P-TDA5-VDK — Synopsys VirtualizerTM development kit for TDA5 drive assist SoCs

The TDA5 Virtualizer Development Kit (VDK), built with Synopsys Virtualizer™, enables software development on a register-accurate simulation of TDA5 drive assist SoCs. This creates an electronics digital twin of production systems to execute unmodified binaries of production software (SW) with (...)
From: Synopsys
Application software & framework

SV-3P-FRONTVISION — FrontVision - STRADVISION automotive perception software

FrontVision detects various elements on the road such as vehicles, pedestrians, lanes, traffic lights, and traffic signs, utilizing the input from the front facing-camera. It enables users to develop autonomous driving features with different levels of autonomy, ranging from fundamental ADAS (...)
From: Stradvision
Application software & framework

SV-3P-SURROUNDVISION — SurroundVision - STRADVISION automotive perception software

SurroundVision detects a wide range of objects around the vehicle, including vehicles, pedestrians, parking slots, and curb stones, from surround view camera images as an input. With its highly accurate preception outputs, it enables users to develop safety features such as blind spot monitoring (...)
From: Stradvision
IDE, configuration, compiler or debugger

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

Supported products & hardware

Supported products & hardware

This design resource supports most products in these categories.

Check the product details page to verify support.

Launch Download options
IDE, configuration, compiler or debugger

GHS-3P-MULTI-IDE — Green Hills Software MULTI Integrated Development Environment

The MULTI® development environment has been in use by thousands of developers for three decades and is the industry’s unrivaled integrated development environment to create, debug, and optimize C, C++ and Ada  code for production-focused applications.  It brings together (...)
Operating system (OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
Operating system (OS)

QNX-3P-NEUTRINO-RTOS — QNX Neutrino® real-time operating system (RTOS)

The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
Operating system (OS)

WHIS-3P-SAFERTOS — WITTENSTEIN SAFERTOS Pre-certified safety RTOS

SAFERTOS® is a unique real time operating system designed for embedded processors. It is precertified to IEC 61508 SIL3 and ISO 26262 ASILD standards by TÜV SÜD. SAFERTOS® was crafted specifically for safety by WHIS' team of experts and is used globally in safety critical applications. WHIS and (...)
Support software

EXLFR-3P-ESYNC-OTA — Excelfore eSync over-the-air (OTA) updates for next generation of software defined vehicles (SDV)

Experience the future of the connected SDV starting with full vehicle OTA from Excelfore. The standardized and structured eSync pipeline securely scales to reach all the ECUs and smart sensors in the car, with the flexibility to cover any in-vehicle network topology or system architecture.
eSync (...)
From: ExcelFore
Support software

TDA54-SW Software package enabling development on TDA54

This folder contains the restricted software packages for TDA54 enabling software development.
Supported products & hardware

Supported products & hardware

Products
Automotive driver assist SoCs
TDA54-Q1 Premium SoC with next generation C7™ NPU for advanced AI in ADAS and software defined vehicles
Software
Software development kit (SDK)
SNPS-3P-TDA5-VDK Synopsys VirtualizerTM development kit for TDA5 drive assist SoCs
Support software

VCTR-3P-MICROSAR — Vector MICROSAR AUTOSAR software for microcontrollers and high-performance computers (HPCs)

MICROSAR and DaVinci product families simplify ECU development with sophisticated embedded software and powerful development tools for both microcontrollers and HPCs. With advanced infrastructure software, you create an optimal basis for your ECUs and simplify all accompanying development tasks (...)
Package Pins CAD symbols, footprints & 3D models
FCBGA (ALF) 827 Ultra Librarian

Ordering & quality

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  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

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