產品詳細資料

Sample rate (max) (Msps) 1800, 3600 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2800 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 4180 Architecture Folding Interpolating SNR (dB) 58.6 ENOB (bit) 9.4 SFDR (dB) 73 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 1800, 3600 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2800 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 4180 Architecture Folding Interpolating SNR (dB) 58.6 ENOB (bit) 9.4 SFDR (dB) 73 Operating temperature range (°C) -40 to 85 Input buffer Yes
PBGA (NXA) 292 729 mm² 27 x 27
  • Configurable to Either 3.6 GSPS Interleaved or 1.8 GSPS Dual ADC
  • Pin-Compatible with ADC10D1000/1500 and ADC12D1000/1600
  • Internally Terminated, Buffered, Differential Analog Inputs
  • Interleaved Timing Automatic and Manual Skew Adjust
  • Test Patterns at Output for System Debug
  • Programmable 15-bit Gain and 12-bit Plus Sign Offset
  • Programmable tAD Adjust Feature
  • 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
  • AutoSync Feature for Multi-Chip Systems
  • Single 1.9-V ± 0.1-V Power Supply
  • Key Specifications
    • Resolution: 12 Bits
    • Interleaved 3.6 GSPS ADC
      • Noise Floor Density –153.5 dBm/Hz (typ)
      • IMD3 –61 dBFS (typ)
      • Noise Power Ratio 48.5 dB (typ)
      • Power 4.4 W (typ)
      • Full Power Bandwidth 1.75 GHz (typ)
    • Dual 1.8 GSPS ADC, Fin = 125MHz
      • ENOB: 9.4 (typ)
      • SNR 58.5 dB (typ)
      • SFDR 73 dBc (typ)
      • Power 4.4 W (typ)
      • Full Power Bandwidth 2.8 GHz (typ)
  • Configurable to Either 3.6 GSPS Interleaved or 1.8 GSPS Dual ADC
  • Pin-Compatible with ADC10D1000/1500 and ADC12D1000/1600
  • Internally Terminated, Buffered, Differential Analog Inputs
  • Interleaved Timing Automatic and Manual Skew Adjust
  • Test Patterns at Output for System Debug
  • Programmable 15-bit Gain and 12-bit Plus Sign Offset
  • Programmable tAD Adjust Feature
  • 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
  • AutoSync Feature for Multi-Chip Systems
  • Single 1.9-V ± 0.1-V Power Supply
  • Key Specifications
    • Resolution: 12 Bits
    • Interleaved 3.6 GSPS ADC
      • Noise Floor Density –153.5 dBm/Hz (typ)
      • IMD3 –61 dBFS (typ)
      • Noise Power Ratio 48.5 dB (typ)
      • Power 4.4 W (typ)
      • Full Power Bandwidth 1.75 GHz (typ)
    • Dual 1.8 GSPS ADC, Fin = 125MHz
      • ENOB: 9.4 (typ)
      • SNR 58.5 dB (typ)
      • SFDR 73 dBc (typ)
      • Power 4.4 W (typ)
      • Full Power Bandwidth 2.8 GHz (typ)

The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in TI’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs.

The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage.

The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C.

To achieve full rated performance for fCLK > 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see Section 5.6.1 for more information.

The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in TI’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs.

The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage.

The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C.

To achieve full rated performance for fCLK > 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see Section 5.6.1 for more information.

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類型 標題 日期
* Data sheet ADC12D1800 12-Bit, Single 3.6 GSPS Ultra High-Speed ADC datasheet (Rev. Q) PDF | HTML 2017年 5月 17日
Application note AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G) 2017年 2月 3日
Application note Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat 2013年 12月 9日
Application note AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C) 2013年 5月 1日
User guide Schematic and Layout Recommendations for the GSPS ADC 2013年 4月 29日
Application note AN-2177 Using the LMH6554 as a ADC Driver (Rev. A) 2013年 4月 26日
Application note From Sample Instant to Data Output: Understanding Latency in the GSPS ADC 2012年 12月 18日
Product overview ADC12D1x00 12-bit ADC Family: Ultra High-Speed 12-bit ADCs up to 3.6 GSPS 2012年 5月 16日
User guide 12-Bit, Dual 1.6/1.8 GSPS or Single 3.2/3.6 GSPS Ref Bd User Guide 2012年 1月 25日

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開發板

ADC-LD-BB — ADC 低失真平衡不平衡轉換器基板

One ADC-LD-BB board is included in the hardware kit with the GSPS analog-to-digital converter (ADC) reference boards. Since the analog inputs to the ADC1xDxx00RB are differential and most signal sources are single ended, these balun boards are generally used to achieve (...)

使用指南: PDF
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開發板

ABACO-3P-FMC160 — Abaco Systems® 類比 1 通道寬頻輸入/輸出 ADC/DAC FPGA 夾層介面卡

The Abaco FMC160 provides one 12-bit 3.6-GSPS analog-to-digital converter (ADC) and one 14-bit 5.7-GSPS digital-to-analog converter (DAC). The module highlights the Texas Instruments ADC12D1800 two-channel, 12-bit, 1.6-GSPS ADC in a daughtercard with an FPGA mezzanine card (FMC) connector using a (...)

支援軟體

WAVEVISION5 WaveVision 5 Software

WaveVision 5 software is part of the WaveVision evaluation system that also includes WaveVision 5 Data Capture Board. The WaveVision 5 system is an easy-to-use data acquisition and analysis tool, designed to help users evaluate Texas Instruments' Signal Path solutions.

While WaveVision 5 software (...)

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支援產品和硬體

產品
高速 ADC (≥10 MSPS)
ADC08D1020 8 位元、雙 1.0-GSPS 或單 2.0-GSPS 類比轉數位轉換器 (ADC) ADC08D1520 8 位元、雙 1.5-GSPS 或單 3.0-GSPS 類比轉數位轉換器 (ADC) ADC10D1000 10 位元、雙 1.0-GSPS 或單 2.0-GSPS 類比轉數位轉換器 (ADC) ADC10D1500 10 位元、雙 1.5-GSPS 或單 3.0-GSPS 類比轉數位轉換器 (ADC) ADC10DV200 雙通道、10 位元、200-MSPS 類比轉數位轉換器 (ADC) ADC12D1000 12 位元、雙 1.0-GSPS 或單 2.0-GSPS 類比轉數位轉換器 (ADC) ADC12D1000RF 12 位元、雙 1.0-GSPS 或單 2.0-GSPS、射頻取樣類比轉數位轉換器 (ADC) ADC12D1600 12 位元、雙 1.6-GSPS 或單 3.2-GSPS 類比轉數位轉換器 (ADC) ADC12D1600RF 12 位元、雙 1.6-GSPS 或單 3.2-GSPS、射頻取樣類比轉數位轉換器 (ADC) ADC12D1800 12 位元、雙 1.8GSPS 或單 3.6GSPS 類比轉數位轉換器 (ADC) ADC12D1800RF 12 位元、雙 1.8GSPS 或單 3.6GSPS、射頻取樣類比轉數位轉換器 (ADC) ADC12D500RF 12 位元、雙 500-MSPS 或單 1.0-GSPS、RF 取樣類比轉數位轉換器 (ADC) ADC12D800RF 12 位元、雙 800-MSPS 或單 1.6-GSPS、射頻取樣類比轉數位轉換器 (ADC) ADC14DC080 雙通道、14 位元、80-MSPS、1.0-GHz 輸入頻寬類比轉數位轉換器 (ADC) ADC16DV160 雙通道、16 位元、160-MSPS 類比轉數位轉換器 (ADC) ADC16V130 16 位元 130-MSPS 類比轉數位轉換器 (ADC)
硬體開發
開發板
ADC08D1520RB ADC08D1520RB:低功耗、8 位元、雙 1.5 GSPS 或單 3.0 GSPS A/D 轉換器參考基板 ADC12D1600RB 12 位元、雙路 1.6/1.8 GSPS 或單路 3.2/3.6 GSPS ADC 參考基板 ADC16DV160HFEB ADC16DV160HFEB 評估板 LM98640CVAL 具有 LVDS 輸出的雙通道、14 位元、40 MSPS 類比前端 WAVEVSN-BRD-5.1 WaveVision 5 資料擷取板 5.1 版
軟體
應用軟體及架構
WAVEVISION5 資料採集和分析軟體
模擬型號

ADC12D1000 IBIS Model

SNAM014.ZIP (41 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
參考設計

TIDA-00113 — 以單通道或雙通道模式驅動 GSPS ADC,適用於高頻寬應用

This design is intended to help the system designer in understanding tradeoffs and optimizing implementation for driving the Giga-Sample-Per-Second ADC with balun configurations for wideband applications.  The tradeoffs considered include balun construction, insertion loss, dynamic (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00479 — 適用於 GSPS ADC 的最佳時鐘來源參考設計

The ADC12D1600RFRB reference design provides a platform to demonstrate a high speed digitizer application which incorporates clocking, power management, and signal processing. The reference design utilizes the 1.6 GSPS ADC12D1600RF device, onboard FPGA Xilinx Virtex 4, and high performance clock (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00071 — 每秒千兆次取樣 (GSPS) ADC 的電路圖和佈線圖建議

This reference design is a guide to the schematics and layout for the system designer using a GSPS ADC in their system. Use this reference design along with the datasheet — the datasheet is always the final authority. Also, the ADC1xDxxxx(RF)RB Reference Board provides a useful reference (...)
使用指南: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PBGA (NXA) 292 Ultra Librarian

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