產品詳細資料

Resolution (Bits) 14 Sample rate (max) (ksps) 200 Number of input channels 1 Interface type Microwire (Serial I/O), SPI Architecture SAR Input type Pseudo-Differential Rating Automotive Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 1 Operating temperature range (°C) -40 to 105 Power consumption (typ) (mW) 4.8 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 80 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
Resolution (Bits) 14 Sample rate (max) (ksps) 200 Number of input channels 1 Interface type Microwire (Serial I/O), SPI Architecture SAR Input type Pseudo-Differential Rating Automotive Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 1 Operating temperature range (°C) -40 to 105 Power consumption (typ) (mW) 4.8 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 80 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
VSSOP (DGS) 10 14.7 mm² (3 mm × 4.9 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C6
  • 14-Bit Resolution With no Missing Codes
  • Specified Performance Up to 200 kSPS
  • Pseudo Differential Inputs
  • Zero-Power Track Mode
  • ±150-mV Swing Around GND on Negative Input
  • Separate Digital I/O and Analog Supplies
  • Operating Temperature Range of –40°C to +105°C
  • SPI™, QSPI™, Microwire, DSP-Compatible Serial Interface
  • Conversion Rate: 50 kSPS to 200 kSPS
  • INL (–15°C to +65°C): ±0.95 LSB (max)
  • DNL: ±0.95 LSB (max)
  • Post Calibration TUE (–15°C to +65°C): ±0.5 mV (max)
  • SNR: 80 dBc (min)
  • THD: –97 dBc (typ)
  • ENOB: 13.0 Bits (min)
  • Power Consumption:
    • 200 kSPS, 5 V: 4.8 mW (typ)
    • Power-Down, 5 V: 13 µW (typ)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C6
  • 14-Bit Resolution With no Missing Codes
  • Specified Performance Up to 200 kSPS
  • Pseudo Differential Inputs
  • Zero-Power Track Mode
  • ±150-mV Swing Around GND on Negative Input
  • Separate Digital I/O and Analog Supplies
  • Operating Temperature Range of –40°C to +105°C
  • SPI™, QSPI™, Microwire, DSP-Compatible Serial Interface
  • Conversion Rate: 50 kSPS to 200 kSPS
  • INL (–15°C to +65°C): ±0.95 LSB (max)
  • DNL: ±0.95 LSB (max)
  • Post Calibration TUE (–15°C to +65°C): ±0.5 mV (max)
  • SNR: 80 dBc (min)
  • THD: –97 dBc (typ)
  • ENOB: 13.0 Bits (min)
  • Power Consumption:
    • 200 kSPS, 5 V: 4.8 mW (typ)
    • Power-Down, 5 V: 13 µW (typ)

The ADC141S628-Q1 device is a 14-bit, 200-kSPS, pseudo-differential, analog-to-digital converter (ADC) that is AEC-Q100 grade 2 qualified. The converter is based on a successive-approximation register (SAR) architecture and has pseudo-differential analog inputs. The signal path is maintained from the internal sample-and-hold circuits throughout the ADC to provide excellent common-mode noise rejection. The ADC141S628-Q1 features a zero-power track mode where the ADC is consuming the minimum amount of supply current while the internal sampling capacitor tracks the applied analog input voltage.

The serial data output of the ADC141S628-Q1 is straight binary and is compatible with several standards, such as SPI, QSPI, Microwire, and many common DSP serial interfaces. The ADC141S628-Q1 has no latency which means the conversion result is clocked out by the serial clock input and is the result of the conversion currently in progress.

The ADC141S628-Q1 can be operated with independent analog (VA) and digital input/output (VIO) supplies. VA and VIO can range from 4.5 V to 5.5 V and can be set independent of each other. This functionality allows a user to maximize performance and minimize power consumption. Similarly, the ADC141S628-Q1 uses an external reference that can be varied from 1.0 V to VA allowing users to optimize the full dynamic range of the input. The pseudo-differential input, low power consumption, and small size make the ADC141S628-Q1 ideal for remote data acquisition applications.

Operation is specified over the temperature range of –40°C to +105°C and clock rates of 0.36 MHz to 3.6 MHz. The ADC141S628-Q1 is available in a 10-lead package.

The ADC141S628-Q1 device is a 14-bit, 200-kSPS, pseudo-differential, analog-to-digital converter (ADC) that is AEC-Q100 grade 2 qualified. The converter is based on a successive-approximation register (SAR) architecture and has pseudo-differential analog inputs. The signal path is maintained from the internal sample-and-hold circuits throughout the ADC to provide excellent common-mode noise rejection. The ADC141S628-Q1 features a zero-power track mode where the ADC is consuming the minimum amount of supply current while the internal sampling capacitor tracks the applied analog input voltage.

The serial data output of the ADC141S628-Q1 is straight binary and is compatible with several standards, such as SPI, QSPI, Microwire, and many common DSP serial interfaces. The ADC141S628-Q1 has no latency which means the conversion result is clocked out by the serial clock input and is the result of the conversion currently in progress.

The ADC141S628-Q1 can be operated with independent analog (VA) and digital input/output (VIO) supplies. VA and VIO can range from 4.5 V to 5.5 V and can be set independent of each other. This functionality allows a user to maximize performance and minimize power consumption. Similarly, the ADC141S628-Q1 uses an external reference that can be varied from 1.0 V to VA allowing users to optimize the full dynamic range of the input. The pseudo-differential input, low power consumption, and small size make the ADC141S628-Q1 ideal for remote data acquisition applications.

Operation is specified over the temperature range of –40°C to +105°C and clock rates of 0.36 MHz to 3.6 MHz. The ADC141S628-Q1 is available in a 10-lead package.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相同,但針腳輸出與所比較的裝置不同。
ADS8353-Q1 現行 具有單端輸入的車用 16 位元 600 kSPS 雙通道同步取樣 SAR ADC 16-bit, 600-kSPS, 2-channel simultaneous sampling ADC

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADC141S628-Q1 14-Bit, 200-kSPS, Pseudo-Differential, Micro-Power ADC datasheet (Rev. C) PDF | HTML 2017/12/15

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VSSOP (DGS) 10 Ultra Librarian

訂購與品質

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片