產品詳細資料

Sample rate (max) (Msps) 25 Resolution (Bits) 14 Number of input channels 1 Interface type CMOS Analog input BW (MHz) 900 Features High Dynamic Range, Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 46 Architecture SAR SNR (dB) 79 ENOB (Bits) 12.8 SFDR (dB) 97 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 25 Resolution (Bits) 14 Number of input channels 1 Interface type CMOS Analog input BW (MHz) 900 Features High Dynamic Range, Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 46 Architecture SAR SNR (dB) 79 ENOB (Bits) 12.8 SFDR (dB) 97 Operating temperature range (°C) -40 to 105 Input buffer No
WQFN (RSB) 40 25 mm² (5 mm × 5 mm)
  • 14-bit 10/25/65 MSPS ADC
  • Noise floor: –155 dBFS/Hz
  • Ultra-low power with optimized power scaling: 35 mW (10 MSPS) to 84 mW (65 MSPS)
  • Latency: 1 clock cycle
  • INL: ±0.6 LSB; DNL: ±0.1 LSB
  • Reference: external or internal
  • Input Bandwidth: 900 MHz (3-dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • SDR/DDR and Serial CMOS interface
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral Performance (fIN = 10 MHz):
    • SNR: 79.0 dBFS
    • SFDR: 87 dBc HD2, HD3
    • SFDR: 99 dBFS Worst Spur
  • Spectral Performance (fIN = 64 MHz):
    • SNR: 78.0 dBFS
    • SFDR: 70 dBc HD2, HD3
    • SFDR: 91 dBFS Worst Spur
  • 14-bit 10/25/65 MSPS ADC
  • Noise floor: –155 dBFS/Hz
  • Ultra-low power with optimized power scaling: 35 mW (10 MSPS) to 84 mW (65 MSPS)
  • Latency: 1 clock cycle
  • INL: ±0.6 LSB; DNL: ±0.1 LSB
  • Reference: external or internal
  • Input Bandwidth: 900 MHz (3-dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • SDR/DDR and Serial CMOS interface
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral Performance (fIN = 10 MHz):
    • SNR: 79.0 dBFS
    • SFDR: 87 dBc HD2, HD3
    • SFDR: 99 dBFS Worst Spur
  • Spectral Performance (fIN = 64 MHz):
    • SNR: 78.0 dBFS
    • SFDR: 70 dBc HD2, HD3
    • SFDR: 91 dBFS Worst Spur

The ADC3541, ADC3542 and ADC3543 (ADC354x) family of devices are low-noise, ultra-low power, 14-bit, 10 to 65-MSPS, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz. The ADC354x offers great dc precision together with IF sampling support, which make these devices an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 79 mW at 65 MSPS, and the power consumption scales very well with lower sampling rates.

The ADC354x uses an SDR, DDR or a serial CMOS interface to output the data offering the lowest power digital interface, together with the flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40°C to +105⁰C.

The ADC3541, ADC3542 and ADC3543 (ADC354x) family of devices are low-noise, ultra-low power, 14-bit, 10 to 65-MSPS, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz. The ADC354x offers great dc precision together with IF sampling support, which make these devices an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 79 mW at 65 MSPS, and the power consumption scales very well with lower sampling rates.

The ADC354x uses an SDR, DDR or a serial CMOS interface to output the data offering the lowest power digital interface, together with the flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40°C to +105⁰C.

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我們的 ADC3660 系列贏得 2021 年世界電子產品成就獎 (WEAA) 放大器/資料轉換類別的年度最佳產品。

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADC354x 14-bit, 10-MSPS to 65-MSPS, Low-noise, Ultra-low Power ADC datasheet (Rev. C) PDF | HTML 2022/12/15
應用說明 High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs 2020/12/9
應用說明 High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization PDF | HTML 2020/12/8
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開發板

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ADC3543EVM — ADC354x 評估模組

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使用者可以向 DATACONVERTERPRO-SW 提供自訂模式,以載入到 TI DAC。支援從 (...)

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模擬型號

ADC35xx TINA-TI Reference Design

SBAM455.ZIP (158 KB) - TINA-TI 參考設計
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