ADC3664
- 14-Bit 125 MSPS ADC
- Noise floor: –156.9 dBFS/Hz
- Low power consumption: 100 mW/ch
- Latency: 2 clock cycles
- Voltage reference:
- External: 65 to 125 MSPS
- Internal: 100 to 125 MSPS
- Guaranteed 14-Bit, no missing codes
- Input bandwidth: 1.4 GHz (3 dB)
- INL: ±2.6 LSB; DNL: ±0.9 LSB
- Industrial temperature range: –40°C to +105°C
- On-chip digital filter (optional)
- Decimation by 2, 4, 8, 16, 32
- 32-bit NCO
- Serial LVDS digital interface (2-, 1- and 1/2-wire)
- Small Footprint: 40-VQFN (5 mm × 5 mm) package
- Spectral performance (fIN = 5 MHz):
- SNR: 77.5 dBFS
- SFDR: 84-dBc HD2, HD3
- SFDR: 92-dBFS worst spur
- Spectral performance (fIN = 70 MHz):
- SNR: 75.5 dBFS
- SFDR: 76-dBc HD2, HD3
- SFDR: 84-dBFS worst spur
The ADC3664 device is a low-noise, ultra-low power, 14-bit, 125-MSPS, high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of –156.9 dBFS/Hz combined with excellent linearity and dynamic range. The ADC3664 offers IF sampling support which makes the device suited for a wide range of applications. High-speed control loops benefit from the short latency as low as one clock cycle. The ADC consumes only 100 mW/ch at 125 MSPS and its power consumption scales very well with lower sampling rates.
The ADC3664 uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports a two-lane, one-lane and half-lane option. The ADC3664 is pin-to-pin compatible with a family of 16-bit resolution ADCs. The device supports the extended industrial temperature range from –40 to +105⁰C.
我們的 ADC3660 系列贏得 2021 年世界電子產品成就獎 (WEAA) 放大器/資料轉換類別的年度最佳產品。
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADC3664 14-Bit, 125-MSPS, Low-Noise, Low Power Dual Channel ADC datasheet (Rev. B) | PDF | HTML | 2022/7/14 | ||
| 應用說明 | Comparing Active vs. Passive High-Speed/RF A/D Converter Front Ends | PDF | HTML | 2025/3/28 | |||
| 應用說明 | Improving MSPS ADC’s SFDR While Relaxing AAF Requirements and Using Integrated DDC Features | PDF | HTML | 2025/2/18 | |||
| 類比設計期刊 | How to simplify AFE filtering via high‐speed ADCs with internal digital filters | 2020/1/10 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ADC3664EVM — 具有 SLVDS 介面的 ADC3664 雙路、14 位元、125MSPS、高 SNR、低功耗 ADC 評估模組
RP-3P-STEMLAB-TI — Red Pitaya STEMlab 與 TI 合作。信用卡大小的 RF 訊號採集和生成平台
Red Pitaya STEMlab TI 入門套件專為工程師、研究人員及教育人員設計,適用於需要高性能、可重新配置平台之測試與量測、資料擷取以及即時訊號處理等領域。非常適合 RF、雷達、通訊、光子學及嵌入式系統開發中高要求的應用。
DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式,v5.31
這款高速資料轉換器專業 GUI 是一款 PC(與 Windows® XP/7/10 相容)程式,旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡,為時域和頻域中的資料轉換器分析提供強大且快速的解決方案,並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容,可快速合成單音、多音和調變訊號。
使用者可以向 DATACONVERTERPRO-SW 提供自訂模式,以載入到 TI DAC。支援從 (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RSB) | 40 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。