ADC3664-SEP
- Radiation tolerant (-SEP only):
- Single-event latch-up (SEL) immune up to LET = 43 MeV-cm2/mg
- Single-event functional interrupt (SEFI) characterized up to LET = 43 MeV-cm2/mg
- Total ionizing dose (TID): 30krad(Si)
- Enhanced product (-EP and -SEP):
- Meets ASTM E595 outgassing specification
- Vendor item drawing (VID)
- Temperature range: –55°C to 105°C
- One fabrication, assembly, and test site
- Gold bond wire, NiPdAu lead finish
- Wafer lot traceability
- Extended product life cycle
- Dual channel, 125MSPS ADC
- 14-bit resolution (no missing codes)
- Noise floor: –156.9dBFS/Hz
- Low power consumption: 100mW/ch (at 125MSPS)
- Latency: 2 clock cycles
- Voltage reference options:
- External: 1 to 125MSPS
- Internal: 100 to 125MSPS
- Input bandwidth: 200MHz (3dB)
- INL: ±2.6 LSB; DNL: ±0.9 LSB (typical)
- On-chip DSP (optional/bypassable)
- Decimation by 2, 4, 8, 16, 32
- 32-bit NCO
- Serial LVDS digital interface (2-, 1- and 1/2-wire)
- Small Footprint: 40 QFN (5 × 5mm) package
- Spectral performance
(fIN = 5MHz):
- SNR: 77.5dBFS
- SFDR: 84dBc HD2, HD3
- SFDR: 92dBFS worst spur
The ADC3664-xEP device is a low-noise, ultra-low power, 14-bit, 125MSPS, high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of -156.9dBFS/Hz combined with linearity and dynamic range. The ADC3664-xEP offers IF sampling support which makes the device designed for a wide range of applications. High-speed control loops benefit from the short latency as low as one clock cycle. The ADC consumes only 100mW/ch at 125MSPS, and the power consumption scales well with lower sampling rates.
The ADC3664-xEP uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports a two-lane, one-lane and half-lane option. The device supports an extended temperature range from –55°C to +105°C.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADC3664-SEP ADC3664-EP 14-Bit, 125MSPS, Low Noise, Low Power Dual Channel ADC datasheet | PDF | HTML | 2025/4/7 | ||
| * | 輻射及可靠性報告 | ADC3664-SEP Single Event Effects Report | PDF | HTML | 2025/3/25 | ||
| * | 輻射及可靠性報告 | ADC3664-SEP Production Flow and Reliability Report | PDF | HTML | 2025/3/19 | ||
| * | 輻射及可靠性報告 | ADC3664-SEP Total Ionizing Dose (TID) Radiation Report | 2025/3/19 |
設計與開發
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ADC3664EVM — 具有 SLVDS 介面的 ADC3664 雙路、14 位元、125MSPS、高 SNR、低功耗 ADC 評估模組
ADC3664EVMCVAL — ADC3664-SP 評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RSB) | 40 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。