產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 52 Number of input channels 8 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5.25 Input voltage range (min) (V) 0 Features Daisy-Chainable Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 245 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 97 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 16 Sample rate (max) (ksps) 52 Number of input channels 8 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5.25 Input voltage range (min) (V) 0 Features Daisy-Chainable Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 245 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 97 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
HTQFP (PAP) 64 144 mm² 12 x 12
  • Simultaneously Sample Four/Eight Channels
  • Selectable Operating Modes:
    High-Speed: 52kSPS Data Rate, 31mW/ch
    Low-Power: 10kSPS Data Rate, 7mW/ch
  • AC Performance:
    25kHz Bandwidth
    97dB SNR
    -105dB THD
  • DC Performance:
    2µV/°C Offset Drift
    2ppm/°C Gain Drift
  • Digital Filter:
    Linear Phase Response
    Passband Ripple: ±0.005dB
    Stop Band Attenuation: 100dB
  • Selectable SPI or Frame Sync Serial Interface
  • Simple Pin-Driven Control
  • Low Sampling Aperture Error
  • Specified from -40°C to +105°C
  • Analog Supply: 5V
  • I/O Supply: 1.8V to 3.3V
  • Digital Core Supply: 1.8V
  • APPLICATIONS
    • 3-Phase Power Monitors
    • Defibrillators and ECG Monitors
    • Coriolis Flow Meters
    • Vibration/Modal Analysis

PowerPAD is a trademark of Texas Instruments.
SPI is a trademark of Motorola, Inc.

  • Simultaneously Sample Four/Eight Channels
  • Selectable Operating Modes:
    High-Speed: 52kSPS Data Rate, 31mW/ch
    Low-Power: 10kSPS Data Rate, 7mW/ch
  • AC Performance:
    25kHz Bandwidth
    97dB SNR
    -105dB THD
  • DC Performance:
    2µV/°C Offset Drift
    2ppm/°C Gain Drift
  • Digital Filter:
    Linear Phase Response
    Passband Ripple: ±0.005dB
    Stop Band Attenuation: 100dB
  • Selectable SPI or Frame Sync Serial Interface
  • Simple Pin-Driven Control
  • Low Sampling Aperture Error
  • Specified from -40°C to +105°C
  • Analog Supply: 5V
  • I/O Supply: 1.8V to 3.3V
  • Digital Core Supply: 1.8V
  • APPLICATIONS
    • 3-Phase Power Monitors
    • Defibrillators and ECG Monitors
    • Coriolis Flow Meters
    • Vibration/Modal Analysis

PowerPAD is a trademark of Texas Instruments.
SPI is a trademark of Motorola, Inc.

The ADS1174 (quad) and ADS1178 (octal) are multiple delta-sigma (ΔΣ) analog-to-digital converters (ADCs) with data rates up to 52k samples-per-second (SPS), which allow synchronous sampling of four and eight channels. These devices use identical packages, and are also compatible with the high-performance 24-bit ADS1274 and ADS1278, permitting drop-in upgrades.

The delta-sigma architecture offers near ideal 16-bit ac performance (97dB SNR, -105dB THD, 1LSB linearity) combined with 0.005dB passband ripple and linear phase response.

The high-order, chopper-stabilized modulator achieves very low drift (2µV/°C offset, 2ppm/°C gain) and low noise (1LSBPP). The on-chip finite impulse response (FIR) filter provides a usable signal bandwidth up to 90% of the Nyquist rate with 100dB of stop band attenuation while suppressing modulator and signal out-of-band noise.

Two operating modes allow for optimization of speed and power: High-speed mode (31mW/Ch at 52kSPS), and Low-power mode (7mW/Ch at 10kSPS).

A SYNC input control pin allows the device conversions to be started and synchronized to an external event. SPI and Frame-Sync serial interfaces are supported. The device is fully specified over the extended industrial range (40°C to +105°C) and is available in an HTQFP-64 PowerPAD package.

The ADS1174 (quad) and ADS1178 (octal) are multiple delta-sigma (ΔΣ) analog-to-digital converters (ADCs) with data rates up to 52k samples-per-second (SPS), which allow synchronous sampling of four and eight channels. These devices use identical packages, and are also compatible with the high-performance 24-bit ADS1274 and ADS1278, permitting drop-in upgrades.

The delta-sigma architecture offers near ideal 16-bit ac performance (97dB SNR, -105dB THD, 1LSB linearity) combined with 0.005dB passband ripple and linear phase response.

The high-order, chopper-stabilized modulator achieves very low drift (2µV/°C offset, 2ppm/°C gain) and low noise (1LSBPP). The on-chip finite impulse response (FIR) filter provides a usable signal bandwidth up to 90% of the Nyquist rate with 100dB of stop band attenuation while suppressing modulator and signal out-of-band noise.

Two operating modes allow for optimization of speed and power: High-speed mode (31mW/Ch at 52kSPS), and Low-power mode (7mW/Ch at 10kSPS).

A SYNC input control pin allows the device conversions to be started and synchronized to an external event. SPI and Frame-Sync serial interfaces are supported. The device is fully specified over the extended industrial range (40°C to +105°C) and is available in an HTQFP-64 PowerPAD package.

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重要文件 類型 標題 格式選項 日期
* Data sheet Quad/Octal, Simultaneous Sampling, 16-Bit Analog-to-Digital Converters datasheet (Rev. B) 2008年 9月 12日
Application brief ADS1278-SP Power-On Reset Procedure PDF | HTML 2025年 3月 25日
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023年 3月 29日
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020年 6月 19日
Analog Design Journal How delta-sigma ADCs work, Part 1 (Rev. A) 2016年 9月 19日
White paper Voltage-reference impact on total harmonic distortion 2016年 8月 1日
E-book Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs 2015年 3月 19日
Analog Design Journal How delta-sigma ADCs work, Part 2 2011年 11月 9日

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