ADS1258
- 24 Bits, No Missing Codes
- Fixed-Channel or Automatic Channel Scan
- Fixed-Channel Data Rate: 125kSPS
- Auto-Scan Data Rate: 23.7kSPS/Channel
- Single-Conversion Settled Data
- 16 Single-Ended or 8 Differential Inputs
- Unipolar (+5V) or Bipolar (±2.5V) Operation
- Low Noise: 2.8µVRMS at 1.8kSPS
- 0.0003% Integral Nonlinearity
- DC Stability (typical):
0.02µV/°C Offset Drift, 0.4ppm/°C Gain Drift - Open-Sensor Detection
- Conversion Control Pin
- Multiplexer Output for External Signal Conditioning
- On-Chip Temperature, Reference, Offset, Gain, and Supply Voltage Readback
- 42mW Power Dissipation
- Standby, Sleep, and Power-Down Modes
- 8 General-Purpose Inputs/Outputs (GPIO)
- 32.768kHz Crystal Oscillator or External Clock
- APPLICATIONS
- Medical, Avionics, and Process Control
- Machine and System Monitoring
- Fast Scan Multi-Channel Instrumentation
- Industrial Systems
- Test and Measurement Systems
SPI is a trademark of Motorola, Inc.
All other trademarks are the property of their respective owners.
The ADS1258 is a 16-channel (multiplexed), low-noise, 24-bit, delta-sigma (
) analog-to-digital converter (ADC) that provides single-cycle settled data at channel scan rates from 1.8k to 23.7k samples per second (SPS) per channel. A flexible input multiplexer accepts combinations of eight differential or 16 single-ended inputs with a full-scale differential range of 5V or true bipolar range of ±2.5V when operating with a 5V reference. The fourth-order delta-sigma modulator is followed by a fifth-order sinc digital filter optimized for low-noise performance.
The differential output of the multiplexer is accessible to allow signal conditioning prior to the input of the ADC. Internal system monitor registers provide supply voltage, temperature, reference voltage, gain, and offset data.
An onboard PLL generates the system clock from a 32.768kHz crystal, or can be overridden by an external clock source. A buffered system clock output (15.7MHz) is provided to drive a microcontroller or additional converters.
Serial digital communication is handled via an SPI™-compatible interface. A simple command word structure controls channel configuration, data rates, digital I/O, monitor functions, etc.
Programmable sensor bias current sources can be used to bias sensors or verify sensor integrity.
The ADS1258 operates from a unipolar +5V or bipolar ±2.5V analog supply and a digital supply compatible with interfaces ranging from 2.7V to 5.25V. The ADS1258 is available in a QFN-48 package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 16-Channel 24-Bit Analog-to-Digital Converter datasheet (Rev. G) | 2011/3/28 | |||
| 應用說明 | Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2024/3/18 | |||
| 應用說明 | A Basic Guide to Bridge Measurements (Rev. A) | PDF | HTML | 2024/3/13 | |||
| 應用說明 | QFN and SON PCB Attachment (Rev. C) | PDF | HTML | 2023/12/6 | |||
| 應用說明 | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2023/3/29 | |||
| 電子書 | Fundamentals of Precision ADC Noise Analysis (Rev. A) | 2020/6/19 | ||||
| 電子書 | Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs | 2015/3/19 | ||||
| 應用說明 | ADS1258, ADS1258-EP, and ADS1158 SPI™ Timeout Function | 2012/4/20 | ||||
| 應用說明 | Analog Front-End Design for ECG Systems Using Delta-Sigma ADCs (Rev. A) | 2010/4/13 | ||||
| 類比設計期刊 | Conversion latency in delta-sigma converters | 2007/1/12 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ADS1258EVM-PDK — ADS1258 性能展示套件
ADS1258 評估模組 (EVM) 性能展示套件 (PDK) 的功能可當做評估 ADS1258 類比轉數位轉換器 (ADC) 的平台。ADS1258 為一款適合速度更快,通道數多的工業應用的 125 kSPS、16 通道、24 位元 Delta Sigma ADC。
PDK 內含 ADS1258EVM,精密主機介面 (PHI) 控制器電路板,以及隨附的電腦軟體,可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料,以及執行資料分析。
ADS1258-C-EXAMPLE-CODE — ADS1258 Example C Code
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFNP (RTC) | 48 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。