產品詳細資料

Resolution (Bits) 24 Sample rate (max) (ksps) 40 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 15.5 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 45 Analog supply voltage (min) (V) -18, 0 Analog supply voltage (max) (V) 18, 36 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
Resolution (Bits) 24 Sample rate (max) (ksps) 40 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 15.5 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Excitation Current Sources (iDACs), GPIO, Oscillator, PGA, Temp Sensor Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 45 Analog supply voltage (min) (V) -18, 0 Analog supply voltage (max) (V) 18, 36 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
VQFN (RHB) 32 25 mm² 5 x 5
  • ±20-V input, 24-bit delta-sigma ADC
  • Programmable data rate: 2.5 SPS to 40 kSPS
  • High-voltage, high-impedance PGA:
    • Differential input range: up to ±20 V
    • Programmable gain: 0.125 to 128
    • Common-mode input voltage: up to ±15.5 V
    • Input impedance: 1 GΩ (minimum)
  • High-performance ADC:
    • Input noise: 45 nVRMS (20 SPS)
    • CMRR: 105 dB
    • Normal-mode rejection at 50 Hz, 60 Hz: 95 dB
    • Offset drift: 5 nV/°C
    • Gain drift: 1 ppm/°C
    • INL: 2 ppm
  • Integrated features and diagnostics:
    • 2.5-V reference: 3 ppm/°C drift
    • Clock oscillator: 2.5% error (maximum)
    • Excitation current sources
    • GPIO to drive external mux
    • Signal and reference voltage monitors
    • Cyclic redundancy check (CRC)
  • Power supplies:
    • AVDD: 4.75 V to 5.25 V
    • DVDD: 2.7 V to 5.25 V
    • HVDD: ±5 V to ±18 V
  • Operating temperature: –40°C to +125°C
  • 5-mm × 5-mm VQFN package
  • ±20-V input, 24-bit delta-sigma ADC
  • Programmable data rate: 2.5 SPS to 40 kSPS
  • High-voltage, high-impedance PGA:
    • Differential input range: up to ±20 V
    • Programmable gain: 0.125 to 128
    • Common-mode input voltage: up to ±15.5 V
    • Input impedance: 1 GΩ (minimum)
  • High-performance ADC:
    • Input noise: 45 nVRMS (20 SPS)
    • CMRR: 105 dB
    • Normal-mode rejection at 50 Hz, 60 Hz: 95 dB
    • Offset drift: 5 nV/°C
    • Gain drift: 1 ppm/°C
    • INL: 2 ppm
  • Integrated features and diagnostics:
    • 2.5-V reference: 3 ppm/°C drift
    • Clock oscillator: 2.5% error (maximum)
    • Excitation current sources
    • GPIO to drive external mux
    • Signal and reference voltage monitors
    • Cyclic redundancy check (CRC)
  • Power supplies:
    • AVDD: 4.75 V to 5.25 V
    • DVDD: 2.7 V to 5.25 V
    • HVDD: ±5 V to ±18 V
  • Operating temperature: –40°C to +125°C
  • 5-mm × 5-mm VQFN package

The ADS125H02 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), an internal reference, clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. 1-GΩ minimum input impedance reduces error caused by sensor loading. Additionally, the low noise and low drift performance allow direct connections to bridge, resistance temperature detector (RTD), and thermocouple sensors.

The digital filter attenuates 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS to reduce measurement error. The filter also provides no-latency conversion data for high data throughput during channel sequencing.

The ADS125H02 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

The ADS125H02 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), an internal reference, clock oscillator, and signal or reference out-of-range monitors.

The integration of a wide input range, ±18-V PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.

Programmable gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. 1-GΩ minimum input impedance reduces error caused by sensor loading. Additionally, the low noise and low drift performance allow direct connections to bridge, resistance temperature detector (RTD), and thermocouple sensors.

The digital filter attenuates 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS to reduce measurement error. The filter also provides no-latency conversion data for high data throughput during channel sequencing.

The ADS125H02 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS125H02 ±20-V Input, 2-Channel, 40-kSPS, 24-Bit, Delta-Sigma ADC With PGA and Voltage Reference datasheet (Rev. C) PDF | HTML 2019年 6月 17日
Circuit design 來自 +5V 供電電源且用於高電壓資料轉換器的精密、±15V 電 源供應電路 PDF | HTML 2025年 12月 9日
Application note K-type thermocouple measurement circuit with precision ADC (Rev. A) PDF | HTML 2024年 9月 20日
Circuit design 4-Ch, diff. in., DAQ front-end circuit w/ configurable voltage & current inputs (Rev. A) PDF | HTML 2024年 9月 19日
Application note Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML 2024年 3月 18日
Application note A Basic Guide to Bridge Measurements (Rev. A) PDF | HTML 2024年 3月 13日
Application note A Basic Guide to RTD Measurements (Rev. A) PDF | HTML 2023年 3月 29日
Application note A Basic Guide to Thermocouple Measurements (Rev. A) PDF | HTML 2023年 3月 29日
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023年 3月 29日
Product overview PLC Analog Input Front-End Architectures PDF | HTML 2022年 7月 31日
Application note ADS124S08 3-Wire PT100 RTD Measurement Circuit w/ Low-Side Reference and 1 IDAC (Rev. B) 2021年 9月 9日
Application note Communication Methods for Data Integrity Using Delta-Sigma Data Converters (Rev. A) PDF | HTML 2021年 8月 23日
Application note RTD Wire-Break Detection Using Precision Delta-Sigma ADCs PDF | HTML 2021年 2月 18日
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020年 6月 19日
Application brief Simplified ±10 V Analog Input Module Using the ADS125H02 2019年 5月 8日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS125H02EVM — ADS125H02 評估模組

ADS125H02 評估模組 (EVM) 是用於評估 ADS125H02 類比轉數位轉換器 (ADC) 的平台。ADS125H02 是一款寬輸入範圍、24 位元、19.2 kSPS 的三角積分 (ΔΣ) ADC,它整合 PGA、電壓參考和內部故障監測器。差動輸入電壓範圍從 ±20mV 至 ±15.5V。這款感測器就緒的 ADC 為最嚴苛的量測應用,包括磅秤、應變計感測器、熱電偶和電阻溫度偵測器 (RTD),提供高精確度、單晶片量測解決方案。

ADS125H02EVM 及 ΔΣ ADC 評估軟體 (DELTASIGMAEVAL-GUI) 皆可減少原型開發時間,讓您的產品更快上市。

使用指南: PDF
支援軟體

ADS125H02-C-EXAMPLE-CODE ADS125H02 example C code

Expedite your embedded design using this example C code for the ADS125H02
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模擬型號

ADS125H0X IBIS Model

SBAM384.ZIP (65 KB) - IBIS Model
計算工具

ADC-RTD-CONFIG-CALC RTD Configuration Calculator for Precision ADCs

This resistance temperature detector (RTD) configuration calculator is a Microsoft® Excel-based tool that helps the user identify a system solution for an RTD application. Two-, three- and four-wire RTD configurations are shown by default, with options for a high-side or low-side reference (...)

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ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

SBAC234 ADS125H02 Design Calculator

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian

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