首頁 數據轉換器 類比轉數位轉換器 (ADC) 精確 ADC
首頁
數據轉換器
類比轉數位轉換器 (ADC)
精確 ADC

ADS1288

現行

適用於地震與近地太空探索的低功率 32 位元雙通道 ΔΣ ADC

立即訂購
產品規格表

ADS1288

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 32 Sample rate (max) (ksps) 2 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 2.5 Input voltage range (min) (V) -2.5 Features GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 5 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 121 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 32 Sample rate (max) (ksps) 2 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 2.5 Input voltage range (min) (V) -2.5 Features GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 5 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 121 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • Power consumption:
    • PGA operation: 5mW (typical)
    • Buffer operation: 3mW (typical)
  • Dynamic range:
    • PGA gain: 1, 500SPS (122dB, typical)
    • Buffer operation: 500SPS (122dB, typical)
  • THD: < –120dB (typical)
  • CMRR: 120dB (typical)
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • Data rates: 125SPS to 2000SPS
  • PGA gains: 1 to 64
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5V, 3.3V, or ±2.5V
  • Power consumption:
    • PGA operation: 5mW (typical)
    • Buffer operation: 3mW (typical)
  • Dynamic range:
    • PGA gain: 1, 500SPS (122dB, typical)
    • Buffer operation: 500SPS (122dB, typical)
  • THD: < –120dB (typical)
  • CMRR: 120dB (typical)
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • Data rates: 125SPS to 2000SPS
  • PGA gains: 1 to 64
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5V, 3.3V, or ±2.5V

The ADS1288 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding requirements of seismology equipment requiring low power consumption to extend battery run time.

The low-noise PGA extends the ADC dynamic range through gains 1 to 64. The PGA allows direct connection to geophones and transformer-coupled hydrophones without the need of an external amplifier. The optional unity-gain buffer reduces power consumption.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with up to 7ppb frequency accuracy.

The ADC supports 3.3V operation to minimize device power consumption. Power consumption is 3mW (typical) in buffer mode operation and 5mW (typical) in PGA mode operation.

The ADC is available in a compact 5mm × 5mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

The ADS1288 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding requirements of seismology equipment requiring low power consumption to extend battery run time.

The low-noise PGA extends the ADC dynamic range through gains 1 to 64. The PGA allows direct connection to geophones and transformer-coupled hydrophones without the need of an external amplifier. The optional unity-gain buffer reduces power consumption.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with up to 7ppb frequency accuracy.

The ADC supports 3.3V operation to minimize device power consumption. Power consumption is 3mW (typical) in buffer mode operation and 5mW (typical) in PGA mode operation.

The ADC is available in a compact 5mm × 5mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.
filter 尋找其它 精確 ADC
下載 觀看有字幕稿的影片 影片

技術文件

找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 2
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS1288 32-Bit, Delta-Sigma ADC for Seismic Applications datasheet (Rev. A) PDF | HTML 2025/11/24
應用說明 Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023/3/29

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS1285EVM-PDK — 適用於 32 位元、高解析度、二通道 delta-sigma ADC 的 ADS1285 性能展示套件

ADS1285 評估模組 (EVM) 性能展示套件 (PDK) 是一款結合 ADS1285EVM-PDK 和精確主機介面 (PHI) 控制器板的平台。PHI 控制器板可讓 ADS1285EVM 透過 USB 埠連接電腦，並與設計用於完全評估 ADS1285 的軟體連接。

使用指南: PDF | HTML
支援產品和硬體
有庫存
限制：
??asset.out-of-stock-ti_zh_TW??
無法提供
計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

支援產品和硬體
設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片