產品詳細資料

Sample rate (max) (Msps) 250 Resolution (Bits) 12 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 1.5 Power consumption (typ) (mW) 350 Architecture Pipeline SNR (dB) 69.7 ENOB (Bits) 11.2 SFDR (dB) 89 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 250 Resolution (Bits) 12 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 1.5 Power consumption (typ) (mW) 350 Architecture Pipeline SNR (dB) 69.7 ENOB (Bits) 11.2 SFDR (dB) 89 Operating temperature range (°C) -40 to 85 Input buffer Yes
VQFN (RGZ) 48 49 mm² (7 mm × 7 mm)
  • ADS41B49: 14-Bit, 250 MSPS
    ADS41B29: 12-Bit, 250 MSPS
  • Integrated High-Impedance
    Analog Input Buffer:
    • Input Capacitance: 2 pF
    • 200-MHz Input Resistance: 3 kΩ
  • Maximum Sample Rate: 250 MSPS
  • Ultralow Power:
    • 1.8-V Analog Power: 180 mW
    • 3.3-V Buffer Power: 96 mW
    • I/O Power: 135 mW (DDR LVDS)
  • High Dynamic Performance:
    • SNR: 69 dBFS at 170 MHz
    • SFDR: 82.5 dBc at 170 MHz
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-Ω Termination
      • 2x Strength: 50-Ω Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain for SNR, SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude
  • Package: VQFN-48 (7 mm × 7 mm)
  • ADS41B49: 14-Bit, 250 MSPS
    ADS41B29: 12-Bit, 250 MSPS
  • Integrated High-Impedance
    Analog Input Buffer:
    • Input Capacitance: 2 pF
    • 200-MHz Input Resistance: 3 kΩ
  • Maximum Sample Rate: 250 MSPS
  • Ultralow Power:
    • 1.8-V Analog Power: 180 mW
    • 3.3-V Buffer Power: 96 mW
    • I/O Power: 135 mW (DDR LVDS)
  • High Dynamic Performance:
    • SNR: 69 dBFS at 170 MHz
    • SFDR: 82.5 dBc at 170 MHz
  • Output Interface:
    • Double Data Rate (DDR) LVDS with Programmable Swing and Strength:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-Ω Termination
      • 2x Strength: 50-Ω Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain for SNR, SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude
  • Package: VQFN-48 (7 mm × 7 mm)

The ADS41Bx9 are members of the ultralow-power ADS4xxx analog-to-digital converter (ADC) family, featuring integrated analog input buffers. These devices use innovative design techniques to achieve high dynamic performance, and consume extremely low power. The analog input pins have buffers, with benefits of constant performance and input impedance across a wide frequency range. The devices are well-suited for multi-carrier, wide bandwidth communications applications such as PA linearization.

The ADS41Bx9 have features such as digital gain and offset correction. The gain option can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. The integrated dc offset correction loop can be used to estimate and cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled-down power with no loss in performance.

The devices support both double data rate (DDR) low-voltage differential signaling (LVDS) and parallel CMOS digital output interfaces. The low data rate of the DDR LVDS interface (maximum 500 MBPS) makes using low-cost field-programmable gate array (FPGA)-based receivers possible. The devices have a low-swing LVDS mode that can be used to further reduce the power consumption. The strength of the LVDS output buffers can also be increased to support 50-Ω differential termination.

The devices are available in a compact VQFN-48 package and are specified over the industrial temperature range (–40°C to +85°C).

The ADS41Bx9 are members of the ultralow-power ADS4xxx analog-to-digital converter (ADC) family, featuring integrated analog input buffers. These devices use innovative design techniques to achieve high dynamic performance, and consume extremely low power. The analog input pins have buffers, with benefits of constant performance and input impedance across a wide frequency range. The devices are well-suited for multi-carrier, wide bandwidth communications applications such as PA linearization.

The ADS41Bx9 have features such as digital gain and offset correction. The gain option can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. The integrated dc offset correction loop can be used to estimate and cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled-down power with no loss in performance.

The devices support both double data rate (DDR) low-voltage differential signaling (LVDS) and parallel CMOS digital output interfaces. The low data rate of the DDR LVDS interface (maximum 500 MBPS) makes using low-cost field-programmable gate array (FPGA)-based receivers possible. The devices have a low-swing LVDS mode that can be used to further reduce the power consumption. The strength of the LVDS output buffers can also be increased to support 50-Ω differential termination.

The devices are available in a compact VQFN-48 package and are specified over the industrial temperature range (–40°C to +85°C).

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開發板

ADS4149EVM — ADS4149 14 位元、250-MSPS 類比轉數位轉換器評估模組

The ADS4149EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4149 device, an extremely low power 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible (...)

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開發板

ADS41B29EVM — ADS41B29 12 位元、250-MSPS 類比轉數位轉換器評估模組

ADS41B29EVM 是一款電路板,設計人員可藉此評估德州儀器 (TI) ADS41B29 裝置的效能,此裝置是一款極低功耗的 12 位元 250 MSPS 類比數位轉換器,整合高阻抗輸入緩衝器。ADC 具有可配置的並行 DDR LVDS 或 CMOS 輸出。EVM 提供了可在各種時鐘、輸入和電源條件下測試 ADS41B29 的靈活環境。

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TSW3085EVM — 寬頻發射訊號鏈評估板和參考設計

The TSW3085 Evalutaion Module is a circuit board that allows system designers to evaluate the combined performance of Texas Instruments' transmit signal chain with the LMK04806B (formally National Semiconductor) low noise clock generator/jitter cleaner. For ease of use as a complete RF transmit (...)

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開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式,v5.31

這款高速資料轉換器專業 GUI 是一款 PC(與 Windows® XP/7/10 相容)程式,旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡,為時域和頻域中的資料轉換器分析提供強大且快速的解決方案,並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容,可快速合成單音、多音和調變訊號。

使用者可以向 DATACONVERTERPRO-SW 提供自訂模式,以載入到 TI DAC。支援從 (...)

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開發模組 (EVM) 的 GUI

SLAC384 — ADS41xx SPI GUI rev1.6

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支援軟體

SBAC120 — TIGAR Support Files

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模擬型號

ADS414x, ADS412x, ADS58B1x, IBIS MODEL

SBAM091A.ZIP (318 KB) - IBIS 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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計算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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設計工具

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGZ) 48 Ultra Librarian

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