ADS4246
- Ultralow power with single 1.8-V Supply, CMOS
output:
- 183 mW Total power at 65 MSPS
- 277 mW Total power at 125 MSPS
- 332 mW Total power at 160 MSPS
- High dynamic performance:
- 88-dBc SFDR at 170 MHz
- 71.4-dBFS SNR at 170 MHz
- Crosstalk: > 90 dB at 185 MHz
- Programmable gain up to 6 dB for SNR/SFDR trade-off
- DC offset correction
- Output interface options:
- 1.8-V parallel CMOS interface
- Double data rate (DDR)
LVDS with programmable swing:
- Standard swing: 350 mV
- Low swing: 200 mV
- Supports low input clock amplitude down to 200 mVPP
- Package: VQFN-64 (9.00 mm × 9.00 mm)
The ADS424x and ADS422x family of devices are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit or 12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8-V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADS42xx Dual-Channel, 14-Bit, 12-Bit, 160, 125, 65 MSPS Ultralow-Power ADC datasheet (Rev. E) | PDF | HTML | 2023/2/14 | ||
| * | 使用指南 | Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) | 2012/7/10 | |||
| 應用說明 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015/5/22 | ||||
| 應用說明 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013/7/19 | ||||
| 應用說明 | High-Speed, Analog-to-Digital Converter Basics | 2012/1/11 | ||||
| 應用說明 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010/9/10 | ||||
| 應用說明 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009/4/28 | ||||
| 應用說明 | CDCE62005 as Clock Solution for High-Speed ADCs | 2008/9/4 | ||||
| 應用說明 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008/6/8 | ||||
| 應用說明 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008/6/2 | ||||
| 應用說明 | QFN Layout Guidelines | 2006/7/28 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
TSW3085EVM — 寬頻發射訊號鏈評估板和參考設計
The TSW3085 Evalutaion Module is a circuit board that allows system designers to evaluate the combined performance of Texas Instruments' transmit signal chain with the LMK04806B (formally National Semiconductor) low noise clock generator/jitter cleaner. For ease of use as a complete RF transmit (...)
ADS58C28SPIGUI-SW — ADS42xxx SPI GUI
DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式，v5.31
這款高速資料轉換器專業 GUI 是一款 PC（與 Windows® XP/7/10 相容）程式，旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡，為時域和頻域中的資料轉換器分析提供強大且快速的解決方案，並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容，可快速合成單音、多音和調變訊號。
使用者可以向 DATACONVERTERPRO-SW 提供自訂模式，以載入到 TI DAC。支援從 (...)
SBAC120 — TIGAR Support Files
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |