ADS5424-SP

現行

Radiation-hardened, QML-V, 150krad, 14-bit single-channel 125MSPS ADC

立即訂購

產品規格表

document-pdfAcrobat Class V, 14 Bit, 105 MSPS Analog-to-Digital Converter datasheet (Rev. D) (英文)

ADS5424-SP

現行

產品規格表

立即訂購

產品詳細資料

Sample rate (max) (Msps)

105

Resolution (Bits)

14

Number of input channels

1

Interface type

Parallel CMOS

Analog input BW (MHz)

570

Features

High Performance

Rating

Space

Peak-to-peak input voltage range (V)

2.2

Power consumption (typ) (mW)

1900

Architecture

Pipeline

SNR (dB)

72.4

ENOB (Bits)

11.7

SFDR (dB)

82.6

Operating temperature range (°C)

-55 to 125

Input buffer

No

Sample rate (max) (Msps)

105

Resolution (Bits)

14

Number of input channels

1

Interface type

Parallel CMOS

Analog input BW (MHz)

570

Features

High Performance

Rating

Space

Peak-to-peak input voltage range (V)

2.2

Power consumption (typ) (mW)

1900

Architecture

Pipeline

SNR (dB)

72.4

ENOB (Bits)

11.7

SFDR (dB)

82.6

Operating temperature range (°C)

-55 to 125

Input buffer

No

CFP (HFG)

52

363.474225 mm² (0 mm × 0 mm)

14-Bit Resolution
105-MSPS Maximum Sample Rate
SNR = 70 dBc at 105 MSPS and 50 MHz IF
SFDR = 78 dBc at 105 MSPS and 50 MHz IF
2.2-V_PP Differential Input Range
5-V Supply Operation
3.3-V CMOS Compatible Outputs
2.3-W Total Power Dissipation
2s Complement Output Format
On-Chip Input Analog Buffer, Track and Hold, and Reference Circuit
52-Pin Ceramic Nonconductive Tie-Bar Package (HFG)
Military Temperature Range
( –55°C to 125°C T_case)
QML-V Qualified, SMD 5962-07206
Engineering Evaluation (/EM) Samples are Available⁽¹⁾
APPLICATIONS
- Single and Multichannel Digital Receivers
- Base Station Infrastructure
- Instrumentation
- Video and Imaging

APPLICATIONS

Clocking: CDC7005
Amplifiers: OPA695, THS4509

⁽¹⁾ These units are intended for engineering evaluation only. They are processed to a non-compliant flow (e.g. No Burn-In, etc.) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.

14-Bit Resolution
105-MSPS Maximum Sample Rate
SNR = 70 dBc at 105 MSPS and 50 MHz IF
SFDR = 78 dBc at 105 MSPS and 50 MHz IF
2.2-V_PP Differential Input Range
5-V Supply Operation
3.3-V CMOS Compatible Outputs
2.3-W Total Power Dissipation
2s Complement Output Format
On-Chip Input Analog Buffer, Track and Hold, and Reference Circuit
52-Pin Ceramic Nonconductive Tie-Bar Package (HFG)
Military Temperature Range
( –55°C to 125°C T_case)
QML-V Qualified, SMD 5962-07206
Engineering Evaluation (/EM) Samples are Available⁽¹⁾
APPLICATIONS
- Single and Multichannel Digital Receivers
- Base Station Infrastructure
- Instrumentation
- Video and Imaging

APPLICATIONS

Clocking: CDC7005
Amplifiers: OPA695, THS4509

⁽¹⁾ These units are intended for engineering evaluation only. They are processed to a non-compliant flow (e.g. No Burn-In, etc.) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.

The ADS5424 is a 14-bit, 105-MSPS analog-to-digital converter (ADC) that operates from a 5-V supply, while providing 3.3-V CMOS compatible digital outputs. The ADS5424 input buffer isolates the internal switching of the on-chip track and hold (T&H) from disturbing the signal source. An internal reference generator is also provided to further simplify the system design. The ADS5424 has outstanding low noise and linearity, over input frequency. With only a 2.2-V_PP input range, ADS5424 simplifies the design of multicarrier applications, where the carriers are selected on the digital domain.

The ADS5424 is available in a 52-pin ceramic nonconductive tie-bar package (HFG). The ADS5424 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full military temperature range (–55°C to 125°C T_case)

This CQFP package has built-in vias that electrically and thermally connect the bottom of the die to a pad on the bottom of the package. To efficiently remove heat and provide a low-impedance ground path, a thermal land is required on the surface of the PCB directly underneath the body of the package. During normal surface mount flow solder operations, the heat pad on the underside of the package is soldered to this thermal land creating an efficient thermal path. Normally, the PCB thermal land has a number of thermal vias within it that provide a thermal path to internal copper areas (or to the opposite side of the PCB) that provide for more efficient heat removal. TI typically recommends a 16-mm² board-mount thermal pad. This allows maximum area for thermal dissipation, while keeping leads away from the pad area to prevent solder bridging. A sufficient quantity of thermal/electrical vias must be included to keep the device within recommended operating conditions. This pad must be electrically at ground potential.

The ADS5424 is a 14-bit, 105-MSPS analog-to-digital converter (ADC) that operates from a 5-V supply, while providing 3.3-V CMOS compatible digital outputs. The ADS5424 input buffer isolates the internal switching of the on-chip track and hold (T&H) from disturbing the signal source. An internal reference generator is also provided to further simplify the system design. The ADS5424 has outstanding low noise and linearity, over input frequency. With only a 2.2-V_PP input range, ADS5424 simplifies the design of multicarrier applications, where the carriers are selected on the digital domain.

The ADS5424 is available in a 52-pin ceramic nonconductive tie-bar package (HFG). The ADS5424 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full military temperature range (–55°C to 125°C T_case)

This CQFP package has built-in vias that electrically and thermally connect the bottom of the die to a pad on the bottom of the package. To efficiently remove heat and provide a low-impedance ground path, a thermal land is required on the surface of the PCB directly underneath the body of the package. During normal surface mount flow solder operations, the heat pad on the underside of the package is soldered to this thermal land creating an efficient thermal path. Normally, the PCB thermal land has a number of thermal vias within it that provide a thermal path to internal copper areas (or to the opposite side of the PCB) that provide for more efficient heat removal. TI typically recommends a 16-mm² board-mount thermal pad. This allows maximum area for thermal dissipation, while keeping leads away from the pad area to prevent solder bridging. A sufficient quantity of thermal/electrical vias must be included to keep the device within recommended operating conditions. This pad must be electrically at ground potential.

filter

尋找其它高速 ADC (≥10 MSPS)

下載觀看有字幕稿的影片影片

技術文件

找不到結果。請清除您的搜尋條件，然後再試一次。

檢視所有 13

重要文件	類型	標題	格式選項	日期
*	資料表	Class V, 14 Bit, 105 MSPS Analog-to-Digital Converter datasheet (Rev. D)		2013/9/16
*	輻射及可靠性報告	ADS5424-SP Radiation Report		2016/12/5
*	輻射及可靠性報告	ADS5424 SEE Report		2015/3/26
*	SMD	ADS5424-SP SMD 5962-07206		2016/7/8
	選擇指南	TI Space Products (Rev. L)		2026/3/27
	Application brief	DLA Approved Optimizations for QML Products (Rev. C)	PDF \| HTML	2025/6/17
	應用說明	Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B)	PDF \| HTML	2025/6/10
	更多文件說明	TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B)		2025/2/20
	應用說明	Single-Event Effects Confidence Interval Calculations (Rev. A)	PDF \| HTML	2022/10/19
	應用說明	Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)		2010/9/10
	應用說明	Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio		2009/4/28
	應用說明	CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters		2008/6/8
	應用說明	Phase Noise Performance and Jitter Cleaning Ability of CDCE72010		2008/6/2