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數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADS5483

現行

16 位元 135-MSPS 類比轉數位轉換器 (ADC)

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產品規格表

ADS5483

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 135 Resolution (Bits) 16 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 485 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 3 Power consumption (typ) (mW) 2100 Architecture Pipeline SNR (dB) 79 ENOB (Bits) 12.6 SFDR (dB) 97 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 135 Resolution (Bits) 16 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 485 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 3 Power consumption (typ) (mW) 2100 Architecture Pipeline SNR (dB) 79 ENOB (Bits) 12.6 SFDR (dB) 97 Operating temperature range (°C) -40 to 85 Input buffer Yes
VQFN (RGC) 64 81 mm² (9 mm × 9 mm)
  • 80/105/135-MSPS Sample Rates
  • 16-Bit Resolution
  • SFDR: 95 dBc at 70 MHz and 135 MSPS
  • SNR: 78.6 dBFS at 70 MHz and 135 MSPS
  • Efficient DDR LVDS-Compatible Outputs
  • Internal Dither Available
  • Total Power Dissipation: 2.2 W
  • Power-Down Mode: 70 mW
  • On-Chip High Impedance Analog Buffer
  • QFN-64 PowerPAD Package (9 mm × 9 mm Footprint)
  • Industrial Temperature Range: –40°C to +85°C
  • APPLICATIONS
    • Wireless Infrastructure (Multi-Carrier GSM, WCDMA, LTE)
    • Test and Measurement Instrumentation
    • Software-Defined Radio
    • Data Acquisition
    • Power Amplifier Linearization
    • Communication Instrumentation
    • Radar
    • Medical Imaging

All trademarks are the property of their respective owners.
  • 80/105/135-MSPS Sample Rates
  • 16-Bit Resolution
  • SFDR: 95 dBc at 70 MHz and 135 MSPS
  • SNR: 78.6 dBFS at 70 MHz and 135 MSPS
  • Efficient DDR LVDS-Compatible Outputs
  • Internal Dither Available
  • Total Power Dissipation: 2.2 W
  • Power-Down Mode: 70 mW
  • On-Chip High Impedance Analog Buffer
  • QFN-64 PowerPAD Package (9 mm × 9 mm Footprint)
  • Industrial Temperature Range: –40°C to +85°C
  • APPLICATIONS
    • Wireless Infrastructure (Multi-Carrier GSM, WCDMA, LTE)
    • Test and Measurement Instrumentation
    • Software-Defined Radio
    • Data Acquisition
    • Power Amplifier Linearization
    • Communication Instrumentation
    • Radar
    • Medical Imaging

All trademarks are the property of their respective owners.

The ADS5481/ADS5482/ADS5483 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T&H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is also provided to simplify the system design.

Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.

The ADS548x is available in an QFN-64 PowerPAD package. The device is built on Texas Instruments complementary bipolar process (BiCom3) and is specified over the full industrial temperature range (–40°C to +85°C).

The ADS5481/ADS5482/ADS5483 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T&H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is also provided to simplify the system design.

Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.

The ADS548x is available in an QFN-64 PowerPAD package. The device is built on Texas Instruments complementary bipolar process (BiCom3) and is specified over the full industrial temperature range (–40°C to +85°C).

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 16-Bit, 80/105/135 MSPS High-Speed ADCs datasheet (Rev. C) 2009/10/6
類比設計期刊 Q3 2009 Issue Analog Applications Journal 2018/9/24
應用說明 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015/5/22
類比設計期刊 Power-supply design for high-speed ADCs (Rev. A) 2015/5/18
應用說明 Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013/7/19
應用說明 High-Speed, Analog-to-Digital Converter Basics 2012/1/11
應用說明 Clock jitter analyzed in the time domain, Part 3 2011/9/16
類比設計期刊 3Q 2011 Issue Analog Applications Journal 2011/9/16
應用說明 Input Impedance Measurement Using ADC FFT Data 2011/1/11
類比設計期刊 Clock jitter analyzed in the time domain, Part 2 2010/11/15
類比設計期刊 4Q 2010 Issue Analog Applications Journal 2010/11/15
應用說明 Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010/9/10
類比設計期刊 Impact of sampling-clock spurs on ADC performance 2009/7/14
應用說明 Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009/4/28
應用說明 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008/6/8
應用說明 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008/6/2
應用說明 QFN Layout Guidelines 2006/7/28

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式，v5.31

這款高速資料轉換器專業 GUI 是一款 PC（與 Windows® XP/7/10 相容）程式，旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡，為時域和頻域中的資料轉換器分析提供強大且快速的解決方案，並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容，可快速合成單音、多音和調變訊號。

使用者可以向 DATACONVERTERPRO-SW 提供自訂模式，以載入到 TI DAC。支援從 (...)

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模擬型號

ADS5483 IBIS Model (Rev. A)

SLAC212 (27 KB) - IBIS 模型
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計算工具

ADC-HARMONIC-CALC — ADC Frequency Calculator Download

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

支援產品和硬體
計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

支援產品和硬體
計算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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設計工具

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGC) 64 Ultra Librarian
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