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數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADS5500

現行

14 位元 125-MSPS 類比轉數位轉換器 (ADC)

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產品規格表

ADS5500

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.3 Power consumption (typ) (mW) 780 Architecture Pipeline SNR (dB) 73.2 ENOB (Bits) 11.3 SFDR (dB) 84 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.3 Power consumption (typ) (mW) 780 Architecture Pipeline SNR (dB) 73.2 ENOB (Bits) 11.3 SFDR (dB) 84 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PAP) 64 144 mm² 12 x 12
  • 14-Bit Resolution
  • 125 Msps Sample Rate
  • High SNR: 71.2 dBFS at 100-MHz fIN
  • High SFDR: 82 dBc at 100-MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 578 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Amplifiers: OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.
  • 14-Bit Resolution
  • 125 Msps Sample Rate
  • High SNR: 71.2 dBFS at 100-MHz fIN
  • High SFDR: 82 dBc at 100-MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 578 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Amplifiers: OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments.

The ADS5500 is a high-performance, 14-bit, 125 Msps analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5500 has excellent power consumption of 578 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5500 is available in a 64-pin TQFP PowerPAD™ package and in both a commercial and industrial temperature grade device.

The ADS5500 is a high-performance, 14-bit, 125 Msps analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5500 has excellent power consumption of 578 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5500 is available in a 64-pin TQFP PowerPAD™ package and in both a commercial and industrial temperature grade device.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet 14-Bit, 125MSPS Analog-to-Digital Converter datasheet (Rev. F) 2007年 2月 8日
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009年 4月 28日
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日
User guide ADS5500/5541/5542/5520/5521/5522 14-&12-Bit Single Channel ADC w/LVDT1422 Output 2006年 7月 26日
Analog Design Journal Low-power, high-intercept interface to the ADS5424, 105-MSPS converter 2005年 10月 10日
User guide ADS5500/5541/5542/5520/5521/5522 14- and 12-Bit Single Channel ADC EVM (Rev. C) 2005年 9月 27日
Analog Design Journal 14-Bit, 125-MSPS ADS5500 Evaluation 2005年 1月 18日
Analog Design Journal Clocking High-Speed Data Converters 2005年 1月 18日
Application note Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC Dev 2004年 6月 25日
Product overview ADS5500 + CDC7005 Product Bulletin 2004年 6月 23日
Application note ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers 2004年 4月 22日
More literature Analogue-to-Digital Converters Support Multicarrier Systems 2004年 3月 2日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

支援軟體

HSADC-SPI-UTILITY — ADS5400 EVM GUI

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模擬型號

ADS55xx IBIS Model (Rev. C)

SBAC028C.ZIP (343 KB) - IBIS Model
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
HTQFP (PAP) 64 Ultra Librarian
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