產品詳細資料

Sample rate (max) (Msps) 250 Resolution (Bits) 11 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 700 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 1250 Architecture Pipeline SNR (dB) 66.5 ENOB (Bits) 10.6 SFDR (dB) 98 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 250 Resolution (Bits) 11 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 700 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 1250 Architecture Pipeline SNR (dB) 66.5 ENOB (Bits) 10.6 SFDR (dB) 98 Operating temperature range (°C) -40 to 85 Input buffer No
VQFN (RGC) 64 81 mm² (9 mm × 9 mm)
  • Maximum Sample Rate: 250 MSPS
  • 11-Bit Resolution
  • Total Power: 1.25 W at 250 MSPS
  • Output Options:
    • DDR LVDS and Parallel CMOS
  • Programmable Gain:
    • Up to 6 dB for SNR and SFDR Trade-Off
  • DC Offset Correction
  • Crosstalk: 90 dB
  • Supports Input Clock Amplitude Down to
    400 mVPP, Differential
  • Internal and External Reference Support
  • Package: 9-mm × 9-mm QFN-64

All trademarks are the property of their respective owners.

  • Maximum Sample Rate: 250 MSPS
  • 11-Bit Resolution
  • Total Power: 1.25 W at 250 MSPS
  • Output Options:
    • DDR LVDS and Parallel CMOS
  • Programmable Gain:
    • Up to 6 dB for SNR and SFDR Trade-Off
  • DC Offset Correction
  • Crosstalk: 90 dB
  • Supports Input Clock Amplitude Down to
    400 mVPP, Differential
  • Internal and External Reference Support
  • Package: 9-mm × 9-mm QFN-64

All trademarks are the property of their respective owners.

The ADS62P19 is part of a family of dual-channel, 11-bit, analog-to-digital converters (ADCs) with sampling rates up to 250 MSPS. The device combines high dynamic performance and low power consumption in a compact QFN-64 package. This functionality makes the device well-suited for multi-carrier, wide-bandwidth communication applications.

The ADS62P19 has gain options that can be used to improve spurious-free dynamic range (SFDR) performance at lower full-scale input ranges. The device includes a dc offset correction loop that can be used to cancel ADC offset. Both double data rate (DDR) low-voltage differential signaling (LVDS) and parallel complementary metal oxide semiconductor (CMOS) digital output interfaces are available.

Although the device includes internal references, the traditional reference pins and associated decoupling capacitors are eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to +85°C).

The ADS62P19 is part of a family of dual-channel, 11-bit, analog-to-digital converters (ADCs) with sampling rates up to 250 MSPS. The device combines high dynamic performance and low power consumption in a compact QFN-64 package. This functionality makes the device well-suited for multi-carrier, wide-bandwidth communication applications.

The ADS62P19 has gain options that can be used to improve spurious-free dynamic range (SFDR) performance at lower full-scale input ranges. The device includes a dc offset correction loop that can be used to cancel ADC offset. Both double data rate (DDR) low-voltage differential signaling (LVDS) and parallel complementary metal oxide semiconductor (CMOS) digital output interfaces are available.

Although the device includes internal references, the traditional reference pins and associated decoupling capacitors are eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to +85°C).

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 Dual-Channel, 11-Bit, 250-MSPS ADC With DDR LVDS and Parallel CMOS Outputs datasheet 2013/4/30
應用說明 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015/5/22
應用說明 Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013/7/19

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模擬型號

ADS61xx, ADS62Pxx HS IBIS Model (Rev. B)

SLWC088 (433 KB) - IBIS 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGC) 64 Ultra Librarian

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