ADS7223
- Eight Pseudo- or Four Fully-Differential Inputs
- Simultaneous Sampling of Two Channels
- Excellent AC Performance:
- SNR:
93 dB (ADS8363)
85 dB (ADS7263)
73 dB (ADS7223) - THD:
–98 dB (ADS8363)
–92 dB (ADS7263)
–86 dB (ADS7223)
- SNR:
- Dual Programmable and Buffered 2.5-V Reference Allows:
- Two Different Input Voltage Range Settings
- Two-Level PGA Implementation
- Programmable Auto-Sequencer
- Integrated Data Storage (up to 4 per channel) for Oversampling Applications
- 2-Bit Counter for Safety Applications
- Fully Specified Over the Extended Industrial Temperature Range: –40°C to +125°C
The ADS8363 is a dual, 16-bit, 1-MSPS analog-to-digital converter (ADC) with eight pseudo- or four fully-differential input channels grouped into two pairs for simultaneous signal acquisition. The analog inputs are maintained differentially to the input of the ADC. The input multiplexer can be used in either pseudo-differential mode, supporting up to four channels per ADC (4x2), or in fully-differential mode that allows to convert up to two inputs per ADC (2x2). The ADS7263 is a 14-bit version and the ADS7223 is a 12-bit version of the ADS8363.
The ADS8363, ADS7263, and ADS7223 offer two programmable reference outputs, flexible supply voltage ranges, a programmable auto-sequencer, data storage of up to four conversion results per channel, and several power-down features.
All devices are offered in a 5-mm x 5-mm, 32-pin VQFN package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADSxxx3 Dual, 1-MSPS, 16-, 14-, and 12-Bit, 4×2 or 2×2 Channel, Simultaneous Sampling Analog-to-Digital Converter datasheet (Rev. D) | PDF | HTML | 2017/9/2 | ||
| Product overview | Precision ADCs for Motor Encoders and Position Sensing (Rev. A) | PDF | HTML | 2025/10/28 | |||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 | ||||
| 應用說明 | Interfacing to the ADS8363 Pseudo-Differential Operating Mode | 2014/8/4 | ||||
| 應用說明 | Using the Sequencer and Pseudo-Differential Features of the ADS8363 | 2014/5/21 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011/3/17 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010/11/10 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHB) | 32 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。