產品詳細資料

Resolution (Bits) 14 Sample rate (max) (ksps) 1000 Number of input channels 2 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 13.7 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 85.9 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 14 Sample rate (max) (ksps) 1000 Number of input channels 2 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 13.7 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 85.9 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
TSSOP (PW) 16 32 mm² 5 x 6.4 VQFN (RSA) 16 16 mm² 4 x 4
  • 2.7V to 5.5V Analog Supply, Low Power:
    • 13.7mW (1MHz, +VA = 3V, +VBD = 1.8V)
  • 1MHz Sampling Rate 3V ≤ +VA ≤ 5.5V,
    900kHz Sampling Rate 2.7V ≤ +VA ≤ 3V
  • Excellent DC Performance:
    • ±0.4LSB Typ, ±1.0LSB Max INL
    • ±0.4LSB Typ, ±1.0LSB Max DNL
    • ±0.8mV Max Offset Error at 3V
    • ±1.25mV Max Offset Error at 5V
  • Excellent AC Performance at fi = 10kHz with 85.9dB SNR, 105.3dB SFDR, -100.1dB THD
  • Built-In Conversion Clock (CCLK)
  • 1.65V to 5.5V I/O Supply:
    • SPI/DSP-Compatible Serial Interface
    • SCLK up to 50MHz
  • Comprehensive Power-Down Modes:
    • Deep Power-Down
    • Nap Power-Down
    • Auto Nap Power-Down
  • Unipolar Input Range: 0V to VREF
  • Software Reset
  • Global CONVST (Independent of CS)
  • Programmable Status/Polarity EOC/INT
  • 4 × 4 QFN-16 and TSSOP-16 Packages
  • Multi-Chip Daisy-Chain Mode
  • Programmable TAG Bit Output
  • Auto/Manual Channel Select Mode (ADS7280)
  • APPLICATIONS
    • Communications
    • Transducer Interface
    • Medical Instruments
    • Magnetometers
    • Industrial Process Control
    • Data Acquisition Systems
    • Automatic Test Equipment
  • 2.7V to 5.5V Analog Supply, Low Power:
    • 13.7mW (1MHz, +VA = 3V, +VBD = 1.8V)
  • 1MHz Sampling Rate 3V ≤ +VA ≤ 5.5V,
    900kHz Sampling Rate 2.7V ≤ +VA ≤ 3V
  • Excellent DC Performance:
    • ±0.4LSB Typ, ±1.0LSB Max INL
    • ±0.4LSB Typ, ±1.0LSB Max DNL
    • ±0.8mV Max Offset Error at 3V
    • ±1.25mV Max Offset Error at 5V
  • Excellent AC Performance at fi = 10kHz with 85.9dB SNR, 105.3dB SFDR, -100.1dB THD
  • Built-In Conversion Clock (CCLK)
  • 1.65V to 5.5V I/O Supply:
    • SPI/DSP-Compatible Serial Interface
    • SCLK up to 50MHz
  • Comprehensive Power-Down Modes:
    • Deep Power-Down
    • Nap Power-Down
    • Auto Nap Power-Down
  • Unipolar Input Range: 0V to VREF
  • Software Reset
  • Global CONVST (Independent of CS)
  • Programmable Status/Polarity EOC/INT
  • 4 × 4 QFN-16 and TSSOP-16 Packages
  • Multi-Chip Daisy-Chain Mode
  • Programmable TAG Bit Output
  • Auto/Manual Channel Select Mode (ADS7280)
  • APPLICATIONS
    • Communications
    • Transducer Interface
    • Medical Instruments
    • Magnetometers
    • Industrial Process Control
    • Data Acquisition Systems
    • Automatic Test Equipment

The ADS7279 is a low-power, 14-bit, 1MSPS analog-to-digital converter (ADC) with a unipolar input. The device includes a 14-bit, capacitor-based successive approximation register (SAR) ADC with inherent sample-and-hold.

The ADS7280 is based on the same core and includes a 2-to-1 input MUX with a programmable TAG bit output option. Both the ADS7279 and ADS7280 offer a high-speed, wide voltage serial interface, and are capable of daisy-chain mode operation when multiple converters are used.

These converters are available in 4 × 4 QFN and TSSOP-16 packages, and are fully specified for operation over the industrial -40°C to +85°C temperature range.

The ADS7279 is a low-power, 14-bit, 1MSPS analog-to-digital converter (ADC) with a unipolar input. The device includes a 14-bit, capacitor-based successive approximation register (SAR) ADC with inherent sample-and-hold.

The ADS7280 is based on the same core and includes a 2-to-1 input MUX with a programmable TAG bit output option. Both the ADS7279 and ADS7280 offer a high-speed, wide voltage serial interface, and are capable of daisy-chain mode operation when multiple converters are used.

These converters are available in 4 × 4 QFN and TSSOP-16 packages, and are fully specified for operation over the industrial -40°C to +85°C temperature range.

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重要文件 類型 標題 格式選項 日期
* Data sheet LOW-POWER, 14-BIT, 1MHz, SINGLE/DUAL UNIPOLAR INPUT, ADC w/SERIAL INTERFACE datasheet (Rev. A) 2009年 6月 17日
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 2011年 3月 17日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010年 11月 10日

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模擬型號

ADS7280 IBIS Model

SBAM118.ZIP (79 KB) - IBIS Model
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

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使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 16 Ultra Librarian
VQFN (RSA) 16 Ultra Librarian

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