ADS7946
- Sample Rate: 2 MSPS
- 14-Bit, Pin-Compatible with 8/10/12-bit ADS7947/8/9 Family (ADS7946)
- Outstanding Performance:
- SNR: 84 dB (ADS7945)
- No Missing Codes
- INL: 1.5 LSB (max) (ADS7945)
- Low Power:
- 11.6 mW at 2 MSPS Operation
- Auto Power-Down at Lower Speeds: 7.2 mW at 500 kSPS1.4 mW at 100 kSPS0.3 mW at 20 kSPS
- Wide Supply Range:
- Analog: 2.7 V to 5.25 V
- Digital: 1.65 V to AVDD
- Simple Serial Interface (SPI)
- Fully Specified from –40°C to +125°C
- Tiny Footprint: 3 mm × 3 mm QFN
The ADS7945/6 are 14-bit, 2 MSPS analog-to-digital converters (ADCs), with differential and single-ended inputs, respectively. The devices operate at a 2 MSPS sample rate with a standard 16-clock data frame. The devices feature both outstanding dc precision and excellent dynamic performance; the ADS7946 is pin-compatible with the 8/10/12-bit ADS7947/8/9 devices. The devices include a two-channel input multiplexer and a low-power successive approximation register (SAR) ADC with an inherent sample-and-hold (S/H) input stage.
The ADS7945/6 support a wide analog supply range that allows the full-scale input range to extend to ±5 V differential or 5 V single-ended. A simple SPI™, with a digital supply that can operate as low as 1.65 V, allows for easy interfacing to a wide variety of digital controllers. Automatic power-down can be enabled when operating at slower speeds to dramatically reduce power consumption.
Offered in a tiny 3 mm × 3 mm QFN package, the ADS7945/6 are fully specified over the extended temperature range of –40°C to +125°C and are suitable for a wide variety of data acquisition applications where high performance, low power, and small package size are key.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 14-Bit, 2-MSPS, Dual-Channel, Differential/Single-Ended, Ultralow-Power ADCs datasheet (Rev. B) | 2011/9/15 | |||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011/3/17 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010/11/10 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RTE) | 16 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。