產品詳細資料

Sample rate (max) (Msps) 5 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 270 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2, 5 Power consumption (typ) (mW) 115 Architecture Pipeline SNR (dB) 69 ENOB (Bits) 11 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 5 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 270 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2, 5 Power consumption (typ) (mW) 115 Architecture Pipeline SNR (dB) 69 ENOB (Bits) 11 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
SSOP (DB) 28 79.56 mm² 10.2 x 7.8
  • HIGH SFDR: 82dB at NYQUIST
  • HIGH SNR: 69dB
  • LOW POWER: 115mW
  • LOW DLE: 0.25LSB
  • FLEXIBLE INPUT RANGE
  • OVER-RANGE INDICATOR
  • APPLICATIONS
    • IF AND BASEBAND DIGITIZATION
    • CCD IMAGING SCANNERS
    • TEST INSTRUMENTATION

  • HIGH SFDR: 82dB at NYQUIST
  • HIGH SNR: 69dB
  • LOW POWER: 115mW
  • LOW DLE: 0.25LSB
  • FLEXIBLE INPUT RANGE
  • OVER-RANGE INDICATOR
  • APPLICATIONS
    • IF AND BASEBAND DIGITIZATION
    • CCD IMAGING SCANNERS
    • TEST INSTRUMENTATION

The ADS803 is a high-speed, high dynamic range, 12-bit pipelined Analog-to-Digital (A/D) converter. This converter includes a high-bandwidth track-and-hold that gives excellent spurious performance up to and beyond the Nyquist rate. This high-bandwidth, linear track-and-hold minimizes harmonics and has low jitter, leading to excellent SNR performance. The ADS803 is also pin-compatible with the 10MHz ADS804 and the 20MHz ADS805.

The ADS803 provides an internal reference and can be programmed for a 2Vp-p input range for the best spurious performance and ease of driving. Alternatively, the 5Vp-p input range can be used for the lowest input referred noise of 0.09LSBs rms giving superior imaging performance. There is also a capability to set the input range in between the 2Vp-p and 5Vp-p input ranges or to use an external reference. The ADS803 also provides an over-range indicator flag to indicate an input range that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of the front-end gain-ranging circuitry.

The ADS803 employs digital error-correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for communications, medical imaging, video, and test instrumentation applications. The ADS803 is available in an SSOP-28 package.

The ADS803 is a high-speed, high dynamic range, 12-bit pipelined Analog-to-Digital (A/D) converter. This converter includes a high-bandwidth track-and-hold that gives excellent spurious performance up to and beyond the Nyquist rate. This high-bandwidth, linear track-and-hold minimizes harmonics and has low jitter, leading to excellent SNR performance. The ADS803 is also pin-compatible with the 10MHz ADS804 and the 20MHz ADS805.

The ADS803 provides an internal reference and can be programmed for a 2Vp-p input range for the best spurious performance and ease of driving. Alternatively, the 5Vp-p input range can be used for the lowest input referred noise of 0.09LSBs rms giving superior imaging performance. There is also a capability to set the input range in between the 2Vp-p and 5Vp-p input ranges or to use an external reference. The ADS803 also provides an over-range indicator flag to indicate an input range that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of the front-end gain-ranging circuitry.

The ADS803 employs digital error-correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for communications, medical imaging, video, and test instrumentation applications. The ADS803 is available in an SSOP-28 package.

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* Data sheet ADS803: 12-Bit, 5MHz Sampling Analog-To-Digital Converter datasheet (Rev. B) 2002年 7月 18日

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