現在提供此產品的更新版本
功能相似於所比較的產品。
ADS828
- HIGH SNR: 58dB
- LOW POWER: 325mW
- 3V/+5V LOGIC I/O COMPATIBLE
- INTERNAL/EXTERNAL REFERENCE OPTION
- SINGLE-ENDED OR DIFFERENTIAL ANALOG INPUT
- PROGRAMMABLE INPUT RANGE: 1Vp-p or 2Vp-p
- LOW DNL: 0.4LSB
- SINGLE +5V SUPPLY OPERATION
- POWER DOWN: 20mW
- SSOP-28 PACKAGE
- APPLICATIONS
- HDTV VIDEO DIGITIZING
- MEDICAL IMAGING
- COMMUNICATIONS
- TEST EQUIPMENT
The ADS828 is a pipeline, CMOS analog-to-digital converter that operates from a single +5V power supply. This converter provides excellent performance with a single-ended input and can be operated with a differential input for added spurious performance. This high performance converter includes a 10-bit quantizer, high bandwidth track/ hold, and a high accuracy internal reference. It also allows for the user to disable the internal reference and utilize external references. This external reference option provides excellent gain and offset matching when used in multi-channel applications or in applications where full scale range adjustment is required.
The ADS828 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for medical imaging, communications, video, and test instrumentation. The ADS828 offers power dissipation of 325mW and also provides a power-down mode, thus reducing power dissipation to only 20mW.
The ADS828 is specified at a maximum sampling frequency of 75MHz and a single-ended input range of 1.5V to 3.5V. The ADS828 is available in a SSOP-28 package and is pin compatible with the 10-bit, 40MHz ADS822 and ADS825, and the 10-bit, 60MHz ADS823 and ADS826.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADS828: SpeedPlus? 10-Bit, 75MHz Sampling Analog-To-Digital Converter datasheet (Rev. A) | 2001/2/23 | |||
| 應用說明 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010/9/10 | ||||
| 應用說明 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009/4/28 | ||||
| 應用說明 | CDCE62005 as Clock Solution for High-Speed ADCs | 2008/9/4 | ||||
| 應用說明 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008/6/8 | ||||
| 應用說明 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008/6/2 | ||||
| 類比設計期刊 | ADS82x ADC with non-uniform sampling clock | 2005/2/28 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |