ADS8321
- BIPOLAR INPUT RANGE
- 100kHz SAMPLING RATE
- MICRO POWER:
- 4.5mW at 100kHz
- 1mW at 10kHz
- POWER DOWN: 3&mirco;A max
- MSOP-8 PACKAGE
- PIN-COMPATIBLE TO ADS7816 AND ADS7822
- SERIAL (SPI/SSI) INTERFACE
- APPLICATIONS
- BATTERY OPERATED SYSTEMS
- REMOTE DATA ACQUISITION
- ISOLATED DATA ACQUISITION
- SIMULTANEOUS SAMPLING, MULTI-CHANNEL SYSTEMS
- INDUSTRIAL CONTROLS
- ROBOTICS
- VIBRATION ANALYSIS
All thradmarks are the property of their respective owners.
The ADS8321 is a 16-bit sampling analog-to-digital converter (ADC) with tested specifications over a 4.75V to 5.25V supply range. It requires very little power even when operating at the full 100kHz data rate. At lower data rates, the high speed of the device enables it to spend most of its time in the power-down modethe average power dissipation is less than 1mW at 10kHz data rate.
The ADS8321 also features a synchronous serial (SPI/SSI compatible) interface, and a differential input. The reference voltage can be set to any level within the range of 500mV to VCC/2.
Ultra-low power and small size make the ADS8321 ideal for portable and battery-operated systems. It is also a perfect fit for remote data acquisition modules, simultaneous multi-channel systems, and isolated data acquisition. The ADS8321 is available in an MSOP-8 package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADS8321: 16-Bit, High Speed, MicroPower Sampling Analog-to-Digital Converter datasheet (Rev. B) | 2004/9/16 | |||
| 類比設計期刊 | Q3 2009 Issue Analog Applications Journal | 2018/9/24 | ||||
| 類比設計期刊 | Q4 2009 Issue Analog Applications Journal | 2018/9/24 | ||||
| 白皮書 | Voltage-reference impact on total harmonic distortion | 2016/8/1 | ||||
| 使用指南 | MSOP-8EVM and MSOP-8EVM-PDK User's Guide (Rev. A) | 2016/2/2 | ||||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011/3/17 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010/11/10 | ||||
| 類比設計期刊 | Using fully differential op amps as attenuators, Part 3 | 2009/10/4 | ||||
| 類比設計期刊 | Using fully differential op amps as attenuators, Part 2 | 2009/7/14 | ||||
| 類比設計期刊 | Using fully differential op amps as attenuators, Part 1 | 2009/5/1 | ||||
| 類比設計期刊 | Q2 2009 Issue Analog Applications Journal | 2009/5/1 | ||||
| 類比設計期刊 | Getting the most out of your instrumentation amplifier design | 2005/10/10 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。