CD54AC273

現行

具有重設功能的八路 D 型正反器

產品詳細資料

Number of channels 8 Technology family AC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 100 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family AC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 100 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 20 167.464 mm² (— mm × — mm)
  • Buffered inputs
  • Typical propagation delay
    • 6.5ns at VCC = 5V, T A = 25°C, CL = 50pF
  • SCR-latchup-resistant CMOS process and circuit design
  • Speed of Bipolar FAST™/AS/S with significantly reduced power consumption
  • Balanced propagation delays
  • AC types feature 1.5v to 5.5v operation and balanced noise immunity at 30% of the supply
  • ±24mA output drive current
    • Fanout to 15 FAST™ ICs
    • Drives 50Ω transmission lines
  • Buffered inputs
  • Typical propagation delay
    • 6.5ns at VCC = 5V, T A = 25°C, CL = 50pF
  • SCR-latchup-resistant CMOS process and circuit design
  • Speed of Bipolar FAST™/AS/S with significantly reduced power consumption
  • Balanced propagation delays
  • AC types feature 1.5v to 5.5v operation and balanced noise immunity at 30% of the supply
  • ±24mA output drive current
    • Fanout to 15 FAST™ ICs
    • Drives 50Ω transmission lines

The ’AC273 and ’ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.

The ’AC273 and ’ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 CDx4AC273, CDx4ACT273 Octal D Flip-Flop with Reset datasheet (Rev. C) PDF | HTML 2024/5/8

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