產品詳細資料

Technology family HCT Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Catalog Supply current (max) (µA) 160
Technology family HCT Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Catalog Supply current (max) (µA) 160
PDIP (N) 16 181.42 mm² 19.3 x 9.4
  • 4.5-V to 5.5-V VCC Operation
  • Input Latches for BCD Code Storage
  • Blanking Capability
  • Phase Input for Complementing Outputs
  • Fanout (Over Temperature Range)
    • Standard Outputs - 10 LSTTL Loads
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • Direct LSTTL input logic compatibility, VIL=0.8 V Maximum, VIH=2 V Minimum
  • CMOS Input Compatibility, II 1µA @ VOL, VOH
  • 4.5-V to 5.5-V VCC Operation
  • Input Latches for BCD Code Storage
  • Blanking Capability
  • Phase Input for Complementing Outputs
  • Fanout (Over Temperature Range)
    • Standard Outputs - 10 LSTTL Loads
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • Direct LSTTL input logic compatibility, VIL=0.8 V Maximum, VIH=2 V Minimum
  • CMOS Input Compatibility, II 1µA @ VOL, VOH

The CD74HCT4543 high-speed silicon-gate is a BCD-to-7 segment latch/decoder/driver designed primarily for directly driving liquid-crystal displays. While the latch enable (LD) is low, the latches are enabled to store the BCD inputs. When the latch enable is high, the latches are disabled, making the outputs transparent to the BCD inputs. The device has an active-high blanking input (BI) and a phase input (PH) to which a square wave is applied for liquid-crystal applications. This square wave also is applied to the backplane of the liquid-crystal display.

The CD74HCT4543 high-speed silicon-gate is a BCD-to-7 segment latch/decoder/driver designed primarily for directly driving liquid-crystal displays. While the latch enable (LD) is low, the latches are enabled to store the BCD inputs. When the latch enable is high, the latches are disabled, making the outputs transparent to the BCD inputs. The device has an active-high blanking input (BI) and a phase input (PH) to which a square wave is applied for liquid-crystal applications. This square wave also is applied to the backplane of the liquid-crystal display.

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CD74HC4511 現行 高速 CMOS 邏輯 BCD 至 7 段鎖存器/解碼器/驅動器 Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

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類型 標題 日期
* Data sheet CD74HCT4543 datasheet (Rev. A) 2003年 4月 7日

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  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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