DRV8161
- Drives two N-channel MOSFETs in half-bridge configuration
- High-side MOSFET source/drain up to 102V (absolute max)
- 8V (5V DRV8162L) to 20V gate drive power supply
- Integrated bootstrap diode
-
Functional Safety Quality-Managed
- Documentation available to aid functional safety system design
- Supports 100% PWM duty cycle with an integrated trickle charge pump
- 16-level gate drive peak current
- 16mA - 1000mA source current
- 32mA - 2000mA sink current
- Source-sink current ratio 1:1, 1:2, 1:3
- Adjustable PWM dead time insertion 20ns - 900ns
- Robust design for motor phase (SH)
switching
- Slew rate 50V/ns
- Negative transient voltage -20V
- 2A strong gate pull down
- Split gate drive supply inputs for redundant shutdown (DRV8162, DRV8162L)
- Low-offset current sense amplifier (DRV8161)
- Adjustable gain (5, 10, 20, 40V/V)
- Flexible PWM control interface; 2-pin PWM, 1-pin PWM, and independent PWM mode
- 13-level VDS over current threshold
- Independent shutdown pin (nDRVOFF)
- Gate driver soft shutdown sequence
- Integrated protection features
- GVDD under voltage (GVDDUV)
- Bootstrap under voltage (BST_UV)
- MOSFET over current protection (VDS)
- Shoot through protection
- Thermal shutdown (OTSD)
- Fault condition indicator (nFAULT)
- Supports 3.3V, and 5V Logic Inputs
The DRV816x devices are half-bridge gate drivers capable of driving high-side and low-side N-channel MOSFETs. The gate drive voltages are generated from the GVDD supply pin and the integrated bootstrap circuit is used to drive the high-side FET up to 102V drain. The Smart Gate Drive architecture supports 16-level (48 combination) gate drive peak current up to 1A source and 2A sink, and a built-in timing control of gate drive current. The devices can be used to drive various types of loads including brushless/brushed DC motors, PMSM, stepper motors, SRM, and solenoids.
Internal protection functions are provided for supply undervoltage, FET over-current, and die over temperature. The nFAULT pin indicates fault events detected by the protection features. The nDRVOFF pin initiates power stage shutdown independent from PWM control. The DRV8162 and DRV8162L devices offer split power supply architecture to assist safe torque off (STO) function.
Many device parameters including gate drive current, dead time, PWM control interface, and over current detection are configurable with a few passive components connected to device pins. An integrated low-side current sense amplifier (DRV8161) provides current measurement information back to the controller.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DRV816x 100V Half-Bridge Smart Gate Driver with Integrated Protection and Current Sense Amplifier datasheet (Rev. C) | PDF | HTML | 2025/2/18 | ||
| Application brief | Understanding Gate Driver Slew Rate Control, MOSFET Switching Optimization and Protection Features (Rev. A) | PDF | HTML | 2025/12/11 | |||
| 技術文章 | 協作機器人到人形裝置：將系統效率與安全性推向更高功率的 機器人 | PDF | HTML | Download English Version | PDF | HTML | 2024/12/2 | |
| 應用說明 | Relating Payload to Brushless DC Motor Driver Specifications | PDF | HTML | 2024/12/2 | |||
| 應用說明 | Three-Phase vs Three-Single Half-Bridge Gate Drivers | PDF | HTML | 2024/11/24 |
設計與開發
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DRV8161EVM — DRV8161 評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGS) | 20 | Ultra Librarian |