DS90LV012A
- Compatible with ANSI TIA/EIA-644-A Standard
- >400 Mbps (200 MHz) switching rates
- 100 ps differential skew (typical)
- 3.5 ns maximum propagation delay
- Integrated line termination resistor (102Ω typical)
- Single 3.3V power supply design (2.7V to 3.6V range)
- Power down high impedance on LVDS inputs
- Accepts small swing (350 mV typical) differential signal levels
- LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
- Supports open, short and terminated input fail-safe
- Pinout simplifies PCB layout
- Low Power Dissipation (10mW typical@ 3.3V static)
- SOT-23 5-lead package
- Leadless WSON-8 package (3x3 mm body size)
- Electrically similar to the DS90LV018A
- Fabricated with advanced CMOS process technology
- Industrial temperature operating range (−40°C to +85°C)
The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology
The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.
The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS90LV012A / DS90LT012A 3-V LVDS Single CMOS Differential Line Receiver datasheet (Rev. E) | PDF | HTML | 2024年 3月 1日 |
| Application note | Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls | 2020年 10月 29日 | ||
| Application note | Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners | 2019年 6月 29日 | ||
| Application brief | LVDS to Improve EMC in Motor Drives | 2018年 9月 27日 | ||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018年 8月 3日 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018年 5月 16日 | ||
| More literature | Die D/S DS90LV012A MDC MWC 3V LVDS Single CMOS Differential Line Receiver | 2013年 1月 8日 | ||
| Application note | An Overview of LVDS Technology | 1998年 10月 5日 |
設計與開發
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DS90LV011-12AEVM — 單通道 LVDS 驅動器和接收器評估模組
DS90LV011-12AEVM 評估模組專為德州儀器 DS90LV011A 3-V LVDS 差動線路驅動器和 DS90LV012A 3-V LVDS 差動線路接收器的性能與功能評估而設計。使用者可運用此套件快速評估 DS90LV011A 和 DS90LV012A 支援的輸出波形特性和訊號完整性。接頭引腳可存取 DS90LV011A 和 DS90LV012A 輸入和輸出，也可便於與實驗室設備或使用者系統的連接，以進行性能評估。
DSLVDS1001-1002EVM — 單通道 LVDS 驅動器和接收器評估模組
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TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOT-23 (DBV) | 5 | Ultra Librarian |
訂購與品質
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