SN54LVC02A
- Operate from 1.65V to 3.6V
- Specified from –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C
- Inputs accept voltages to 5.5V
- Max tpd of 4.4ns at 3.3V
- Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
- Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
- Latch-up performance exceeds 250mA per JESD 17
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.
The device performs the Boolean function Y = A + B or Y = A ⋅ B in positive logic.
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.
技術文件
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| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SNx4LVC02A Quadruple 2-Input Positive-NOR Gates datasheet (Rev. T) | PDF | HTML | 2024/12/19 | ||
| * | SMD | SN54LVC02A SMD 5962-97604 | 2016/6/21 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| CFP (W) | 14 | Ultra Librarian |
| CDIP (J) | 14 | Ultra Librarian |
| LCCC (FK) | 20 | Ultra Librarian |