SN54LVC32A

現行

軍用 4 通道、2 輸入、2-V 至 3.6-V 24-mA 驅動強度 OR 閘

立即訂購

產品規格表

document-pdfAcrobat SNx4LVC32A Quadruple 2-Input Positive-OR Gates datasheet (Rev. U) (英文) PDF | HTML

SN54LVC32A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LVC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Military

Operating temperature range (°C)

-55 to 125

Technology family

LVC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Military

Operating temperature range (°C)

-55 to 125

LCCC (FK)

79.0321 mm² (— mm × — mm)

CFP (W)

58.023 mm² (— mm × — mm)

CDIP (J)

130.4652 mm² (— mm × — mm)

Operate from 1.65V to 3.6V
Specified from –40°C to +85°C, –40°C to +125°C, and –55°C to +125°C
Inputs accept voltages to 5.5V
Max tpd of 3.8ns at 3.3V
Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°C
Latch-up performance exceeds 250mA per JESD 17
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
ESD protection exceeds JESD 22
- 2000V human-body model
- 1000V charged-device model

Operate from 1.65V to 3.6V
Specified from –40°C to +85°C, –40°C to +125°C, and –55°C to +125°C
Inputs accept voltages to 5.5V
Max tpd of 3.8ns at 3.3V
Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°C
Latch-up performance exceeds 250mA per JESD 17
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
ESD protection exceeds JESD 22
- 2000V human-body model
- 1000V charged-device model

The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC32A devices perform the Boolean function Y = A + B or Y = /A • /B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC32A devices perform the Boolean function Y = A + B or Y = /A • /B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

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