SN65LVDS179-EP
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Meet or Exceed the Requirements of ANSI TIA/EIA-644-1995 Standard
- Signaling Rates up to 400 Mbps
- Bus-Terminal ESD Exceeds 12 kV
- Operates From a Single 3.3-V Supply
- Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 100-
Load - Propagation Delay Times
- Driver: 1.7 ns Typ
- Receiver: 3.7 ns Typ
- Power Dissipation at 200 MHz
- Driver: 25 mW Typical
- Receiver: 60 mW Typical
- LVTTL Input Levels Are 5-V Tolerant
- Receiver Maintains High Input Impedance With VCC < 1.5 V
- Receiver Has Open-Circuit Fail Safe
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100- load, and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.
The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100- characteristic impedance. The transmission media may be printed circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics.)
The devices offer various driver, receiver, and enabling combinations in industry standard footprints. Since these devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state, but rather disconnects the input and reduces the quiescent power used by the device. (For these functions with a high-impedance driver output, see the SN65LVDM series of devices.) All devices are characterized for operation from -55°C to 125°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN65LVDS179-EP, SN65LVDS180-EP, SN65LVDS050-EP, SN65LVDS051-EP datasheet (Rev. B) | 2007年 1月 16日 | |
| * | Radiation & reliability report | SN65LVDS179MDGKREP Reliability Report | 2018年 3月 14日 | |
| * | VID | SN65LVDS179-EP VID V6207612 | 2016年 6月 21日 | |
| Application brief | LVDS to Improve EMC in Motor Drives | 2018年 9月 27日 | ||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018年 8月 3日 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018年 5月 16日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
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- 鉛塗層/球物料
- MSL 等級/回焊峰值
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- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
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