產品詳細資料

Number of channels 16 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family ABT Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 16 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family ABT Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm)
  • Members of the Texas Instruments WidebusTM Family
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

 

Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.

  • Members of the Texas Instruments WidebusTM Family
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

 

Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.

The 'ABT16623 are 16-bit transceivers designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The 'ABT16623 provide true data at the outputs.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and ) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and . Each output reinforces its input in this configuration. When both OEAB and are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (32 total) remain at their last states.

 

To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN54ABT16623 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16623 is characterized for operation from -40°C to 85°C.

 

 

The 'ABT16623 are 16-bit transceivers designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing. The 'ABT16623 provide true data at the outputs.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and ) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB and . Each output reinforces its input in this configuration. When both OEAB and are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (32 total) remain at their last states.

 

To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN54ABT16623 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16623 is characterized for operation from -40°C to 85°C.

 

 

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* 資料表 16-Bit Bus Transceivers With 3-State Outputs datasheet (Rev. B) 1997/1/1

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