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XOR (exclusive OR) 閘

SN74AHC1G86-EP

現行

強化型產品單 2 輸入、2-V 至 5.5-V XOR (exclusive OR) 閘

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產品規格表

SN74AHC1G86-EP

現行
產品規格表 立即訂購

產品詳細資料

Technology family AHC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 50 Input type Standard CMOS IOH (max) (mA) -50 Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family AHC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 50 Input type Standard CMOS IOH (max) (mA) -50 Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 10 ns at 5 V
  • Low Power Consumption, 10 µA Max ICC
  • ±8 mA Output Drive at 5 V
  • Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 10 ns at 5 V
  • Low Power Consumption, 10 µA Max ICC
  • ±8 mA Output Drive at 5 V
  • Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74AHC1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

The SN74AHC1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
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SN74LVC1G86-EP 現行 增強型產品單路 2 輸入、1.65-V 至 5.5-V XOR (exclusive OR) 閘 Voltage range (1.65V to 5.5V), average drive strength (24mA), average propagation delay (5.5ns)

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類型 標題 日期
* Data sheet Single 2-Input Exclusive-OR Gate datasheet 2008年 2月 19日
* VID SN74AHC1G86-EP VID V6208612 2016年 6月 21日
* Radiation & reliability report SN74AHC1G86MDCKREP Reliability Report 2013年 9月 5日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note How to Select Little Logic (Rev. A) 2016年 7月 26日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004年 11月 4日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
Application note Selecting the Right Level Translation Solution (Rev. A) 2004年 6月 22日
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 2002年 12月 2日
Application note Texas Instruments Little Logic Application Report 2002年 11月 1日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 2000年 2月 24日
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 1999年 9月 8日
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 1998年 4月 1日
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 1997年 12月 1日
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997年 8月 1日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Live Insertion 1996年 10月 1日

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