SN74ALS137A
- Combines Decoder and 3-Bit Address Latch
- Incorporates Two Output Enables to Simplify Cascading
- Package Options Include Plastic Small- Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
The SN54ALS137A, SN74ALS137A, and SN74AS137 are 3-line to 8-line
decoders/demultiplexers with latches on the three address inputs.
When the latch-enable (
)
input is low, the devices act as decoders/demultiplexers. When goes from low to high, the address
present at the select (A, B, and C) inputs is stored in the latches.
Further address changes are ignored as long as remains high. The output-enable
controls (G1 and G2\) control the outputs independently of the select
or latch-enable inputs. All of the outputs are forced high if G1 is
low or G2\ is high. These devices are ideally suited for implementing
glitch-free decoders in strobed (stored-address) applications in
bus-oriented systems.
The SN54ALS137A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS137A and SN74AS137 are characterized for operation from 0°C to 70°C.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 日期 |
|---|---|---|---|---|
| * | Data sheet | 3-Line To 8-Line Decoders/Demultiplexers With Address Latches datasheet (Rev. C) | 1995年 1月 1日 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中的可靠性監測
- 晶圓廠位置
- 組裝地點