產品詳細資料

Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 30000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 30000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • 3-State Buffer-Type Noninverting Outputs Drive Bus Lines Directly
  • Bus-Structured Pinout
  • Buffered Control Inputs
  • SN74ALS575A and ´AS575 Have Synchronous Clear
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J, JT) 300-mil DIPs, and Ceramic Flat (W) Packages

 

  • 3-State Buffer-Type Noninverting Outputs Drive Bus Lines Directly
  • Bus-Structured Pinout
  • Buffered Control Inputs
  • SN74ALS575A and ´AS575 Have Synchronous Clear
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J, JT) 300-mil DIPs, and Ceramic Flat (W) Packages

 

These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear () input low.

The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS574B, SN74ALS575A, SN74AS574, and SN74AS575 are characterized for operation from 0°C to 70°C.

These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear () input low.

The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS574B, SN74ALS575A, SN74AS574, and SN74AS575 are characterized for operation from 0°C to 70°C.

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SN74AHCT574 現行 具有 3 態輸出的八路邊緣觸發 D 型正反器 Voltage range (4.5V to 5.5V), average drive strength (8mA), average propagation delay (9ns)

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類型 標題 日期
* Data sheet Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs datasheet (Rev. B) 1995年 7月 1日

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  • 進行中持續性的可靠性監測
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