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緩衝器、驅動器和收發器
非反相緩衝器和驅動器

SN74AS757

現行

具有開集極電路輸出的 8 通道、4.5-V 至 5.5-V 雙極緩衝器

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產品規格表

SN74AS757

現行
產品規格表 立即訂購

產品詳細資料

Technology family AS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 Supply current (max) (µA) 95000 IOH (max) (mA) 0 Input type Bipolar Output type Open-collector Features Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) 0 to 70
Technology family AS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 Supply current (max) (µA) 95000 IOH (max) (mA) 0 Input type Bipolar Output type Open-collector Features Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Eliminate the Need for 3-State Overlap Protection
  • pnp Inputs Reduce dc Loading
  • Open-Collector Versions of ´AS240A and ´AS241
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 
  • Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Eliminate the Need for 3-State Overlap Protection
  • pnp Inputs Reduce dc Loading
  • Open-Collector Versions of ´AS240A and ´AS241
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters by eliminating the need for 3-state overlap protection. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable () inputs, and complementary OE and inputs. These devices feature high fan-out and improved fan-in.

The SN54AS756 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS756 and SN74AS757 are characterized for operation from 0°C to 70°C.

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters by eliminating the need for 3-state overlap protection. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable () inputs, and complementary OE and inputs. These devices feature high fan-out and improved fan-in.

The SN54AS756 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS756 and SN74AS757 are characterized for operation from 0°C to 70°C.
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類型 標題 日期
* Data sheet Octal Buffers & Line Drivers With Open-Collector Outputs datasheet (Rev. B) 1995年 1月 1日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Advanced Schottky Load Management 1997年 2月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note Advanced Schottky (ALS and AS) Logic Families 1995年 8月 1日

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14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

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模擬型號

SN74AS757 Behavioral SPICE Model

SDAM034.ZIP (7 KB) - PSpice Model
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PDIP (N) 20 檢視選項
SOIC (DW) 20 檢視選項
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