產品詳細資料

Bits (#) 16 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 1.2 Vin (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Applications RGMII Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) Technology family AVC Supply current (max) (mA) 0.045 Rating Catalog Operating temperature range (°C) -40 to 85
Bits (#) 16 Data rate (max) (Mbps) 380 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 1.2 Vin (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Applications RGMII Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) Technology family AVC Supply current (max) (mA) 0.045 Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm)
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • Overvoltage-Tolerant Inputs and Outputs Allow Mixed-Voltage-Mode Data Communications
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2V to 3.6V Power-Supply Range
  • Ioff Supports Partial-Power-Down Mode Operation
  • I/Os Are 4.6V Tolerant
  • Maximum Data Rates
    • 380Mbps (1.8V to 3.3V Level-Shifting)
    • 200Mbps (<1.8V to 3.3V Level-Shifting)
    • 200Mbps (Level-Shifting to 2.5V or 1.8V)
    • 150Mbps (Level-Shifting to 1.5V)
    • 100Mbps (Level-Shifting to 1.2V)
  • Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000V Human-Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged-Device Model (C101)
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • Overvoltage-Tolerant Inputs and Outputs Allow Mixed-Voltage-Mode Data Communications
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2V to 3.6V Power-Supply Range
  • Ioff Supports Partial-Power-Down Mode Operation
  • I/Os Are 4.6V Tolerant
  • Maximum Data Rates
    • 380Mbps (1.8V to 3.3V Level-Shifting)
    • 200Mbps (<1.8V to 3.3V Level-Shifting)
    • 200Mbps (Level-Shifting to 2.5V or 1.8V)
    • 150Mbps (Level-Shifting to 1.5V)
    • 100Mbps (Level-Shifting to 1.2V)
  • Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000V Human-Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged-Device Model (C101)

This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC16T245 device is optimized to operate with VCCA/VCCB set at 1.4V to 3.6V. The device is operational with VCCA/VCCB as low as 1.2V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVC16T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses effectively are isolated.

The SN74AVC16T245 control pins (1DIR, 2DIR, 1 OE, and 2 OE) are supplied by VCCA.

This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC16T245 device is optimized to operate with VCCA/VCCB set at 1.4V to 3.6V. The device is operational with VCCA/VCCB as low as 1.2V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVC16T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses effectively are isolated.

The SN74AVC16T245 control pins (1DIR, 2DIR, 1 OE, and 2 OE) are supplied by VCCA.

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模擬型號

HSPICE Model of SN74AVC16T245

SCEJ169.ZIP (100 KB) - HSpice 模型
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模擬型號

SN74AVC16T245 IBIS Model

SCEM451.ZIP (69 KB) - IBIS 模型
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian

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