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邏輯和電壓轉換
電壓轉換器及電平移位器
方向控制電壓轉換器

SN74AXC4T774

現行

具有三態輸出和獨立方向控制輸入的 4 位元雙電源匯流排收發器

立即訂購
產品規格表

SN74AXC4T774

現行
產品規格表 立即訂購

產品詳細資料

Technology family AXC Applications I2S, JTAG, SPI, UART Bits (#) 4 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 310 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 40 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications I2S, JTAG, SPI, UART Bits (#) 4 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 310 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 40 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4 UQFN (RSV) 16 4.68 mm² 2.6 x 1.8 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Independent direction control pins to allow configurable up and down translation
  • Glitch-free power supply sequencing
  • Up to 310 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model
  • Fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
  • Operating temperature from –40°C to +125°C
  • Independent direction control pins to allow configurable up and down translation
  • Glitch-free power supply sequencing
  • Up to 310 Mbps support when translating from 1.8 V to 3.3 V
  • VCC isolation feature
    • If either VCC input is below 100 mV, all I/Os outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with AVC family level shifters
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model

The SN74AXC4T774 is a four-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXC4T774 is compatible with a single-supply system.

The SN74AXC4T774 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIRx). The output-enable input (OE) is used to disable the outputs so the buses are effectively isolated. The SN74AXC4T774 device is designed so the control pins (DIRx and OE) are referenced to VCCA.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie the OE pin to VCCA through a pullup resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100 mV, both I/O ports are set to the high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXC4T774 is a four-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXC4T774 is compatible with a single-supply system.

The SN74AXC4T774 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIRx). The output-enable input (OE) is used to disable the outputs so the buses are effectively isolated. The SN74AXC4T774 device is designed so the control pins (DIRx and OE) are referenced to VCCA.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie the OE pin to VCCA through a pullup resistor.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100 mV, both I/O ports are set to the high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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技術文件

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類型 標題 日期
* Data sheet SN74AXC4T774 4-Bit Dual-Supply Bus Transceiver with Independent Direction Control, Configurable Voltage Translation, and Tri-State Outputs datasheet (Rev. C) PDF | HTML 2024年 1月 29日
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024年 10月 2日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Enabling Power-Efficient FPGA Designs With Level Translation PDF | HTML 2024年 4月 30日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023年 4月 3日
Application brief Enabling Robust and Competitive Wireless Tracking Modules with Logic PDF | HTML 2021年 10月 15日
Application note Translate Voltages for SPI (Rev. A) PDF | HTML 2021年 8月 4日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note 2N7001T Voltage Level Translator for SPI, UART, JTAG Interface (Rev. A) PDF | HTML 2021年 3月 29日
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 2021年 3月 29日
Technical article Enabling smart meter wireless connectivity with level translation PDF | HTML 2019年 10月 23日
EVM User's guide SPI,JTAG Interface low voltage translation using SN74AXC4T774EVM 2018年 10月 29日

設計與開發

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開發板

14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組

14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用途可支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

使用指南: PDF | HTML
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開發板

SN74AXC4T774EVM — 方向控制雙向轉換裝置，可支援 SPI、JTAG、UART 介面的 EVM

This EVM is designed to support SN74AXC4T774 in RSV and PW packages. It is also backwards compatible to allow the use of the existing SN74AVC4T774 device in these packages. The AXC device belong to the low voltage direction controlled translation family with operating voltage from 0.65V to 3.6V (...)
使用指南: PDF
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模擬型號

SN74AXC4T774 IBIS MODEL (Rev. A)

SCEM589A.ZIP (140 KB) - IBIS Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 16 Ultra Librarian
UQFN (RSV) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
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