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通訊協定與匯流排開關與多工器

SN74CBT16861

現行

具有 2 個控制輸入的 5-V、1:1 (SPST)、20 通道通用型 FET 匯流排開關

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產品規格表

SN74CBT16861

現行
產品規格表 立即訂購

產品詳細資料

Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 22000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 22000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Member of Texas Instruments' WidebusTM Family
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

    Widebus is a trademark of Texas Instruments.
  • Member of Texas Instruments' WidebusTM Family
  • 5- Switch Connection Between Two Ports
  • TTL-Compatible Input Levels
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

    Widebus is a trademark of Texas Instruments.

The SN74CBT16861 provides 20 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one dual 10-bit switch with separate output-enable (OE\) input. When OE\ is low, the switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

The SN74CBT16861 provides 20 bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as one dual 10-bit switch with separate output-enable (OE\) input. When OE\ is low, the switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
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功能相同，但針腳輸出與所比較的裝置不同。
SN74CBT16210C 現行 具有 –2-V 未達目標保護和 2 路控制輸入的 5-V、1:1 (SPST)、20 通道 FET 匯流排開關 Lower internal resistance

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 20-Bit FET Bus Switch datasheet (Rev. C) 2000/10/23

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