SN74CBTLV16211
- Member of the Texas Instruments Widebus™ Family
- 5-
Switch Connection Between Two Ports - Rail-to-Rail Switching on Data I/O Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
Widebus is a trademark of Texas Instruments.
The SN74CBTLV16211 provides 24 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as dual 12-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE\ is low, the associated 12-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74CBTLV16211 datasheet (Rev. I) | 2003/10/10 | |||
| 應用說明 | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/6/2 | |||
| 應用說明 | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/1 | |||
| Application brief | Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) | PDF | HTML | 2021/1/6 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DL) | 56 | Ultra Librarian |
| TVSOP (DGV) | 56 | Ultra Librarian |
| TSSOP (DGG) | 56 | Ultra Librarian |